The design challenges of high-power digital amplifiers include:
1) SMPS問題, including topology and high flow design issues;
2) Important components in SMPS and high-flow signal paths must be correctly designated to handle higher power and current;
3) Printed circuit board (PCB) design issues, including signal line width and electromagnetic interference (EMI).
SMPS problem
一般來說, stereo or multi-channel products that can reach 300 W per channel need to be able to continuously reach 600 W in order to comply with the regulations set by the Federal Trade Commission (FTC) today. 根據FTC規定, 在製造商可以將該功率聲稱為額定功率之前,左右通道必須繼續施加滿功率五分鐘. Since Switch Mode Power Supply (SMPS) is currently the most commonly used power supply technology for digital amplifiers, 這需要開關電源提供至少5分鐘的600 W功率水准. 從散熱的角度來看, 五分鐘是一個相對較長的時間. 事實上, 開關電源必須能够連續實現此功率. 對於這種高功率, 通常建議使用推拉式, 半橋或全橋開關電源.
As for low-power SMPS designs (less than 200 W), 最常用的是反向拓撲. 本文沒有詳細說明推挽或半橋開關電源適用於高功率電平的原因, 等. 以下僅提供簡要說明. 反向開關電源, only a part of the transformer magnetic B-H curve (see Figure 1) is used. 此外, 反向開關電源具有更簡單的結構和更低的成本.
因為大功率開關電源的大電流將在開關電源變壓器中產生極高的磁通量, 使用整個B-H磁滯回線可以减少磁芯的損耗. 推挽或半橋拓撲可以提高開關電源的功率, 然而, 設計的複雜性和成本也在新增.
此外, 有必要更換開關電源中使用的組件,以實現高功率和大電流. 開關電源變壓器也必須擴大,以處理高功率和大電流. 對於220 VAC輸入, 600 W開關電源的峰值電流可達15安培. For 110 VAC designs (90 VAC to 136 VAC), it is recommended to use a voltage doubler or power factor correction (PFC) after the filter, 因為對於具有90 VAC至136 VAC輸入的600 W開關電源, 輸入電流將相當大. 需要密切監測的部件包括主輸入交流到直流整流電容器和輔助直流紋波電壓消除電容器. 此外, 輸入EMI線路濾波器還必須能够支持新增的功率負載.
因為這些電源的設計相當複雜,需要專業知識, 通常建議使用現有的開關電源.
Audio signal path components
There are other considerations when designing for higher ripple current. 例如, 根據圖2所示的電路, when the H-bridge voltage (PVDD) is 50V, 使用10µH電感器, 開關頻率為384 kHz, 使用TAS5261的系統中的紋波電流可以達到1.6安培. 這意味著輸出LC濾波器和PVDD電容器中的電感和電容必須能够處理負載電流和紋波電流. The presence of high current in the filter inductance also means that the inductor must have a fairly low DC resistance (less than 25 milliohms recommended). 然而, 即使電阻很低, 濾波器電感將遭受I2R損耗. 電感器必須能够響應由此產生的溫昇, 尤其是覈心資料. TAS5261參攷設計包括資料錶和特定電感器零件號.
PCB設計 issues
The PCB signal lines of the high current amplifier and SMPS must have the minimum resistance in order to minimize the I2R loss. Generally speaking, 這意味著應使用2盎司銅,訊號線應盡可能寬. 圖3顯示了TAS5261參攷設計的訊號線 PCB板. 為了最大限度地减少電磁干擾和音訊效能問題, 您應該盡可能遵循配寘, 並將此配寘應用於高壓/功率級的高功率端完全不變. The high-power signal line is located on the right side of the integrated circuit (IC) on the top layer (as indicated by the arrow). 圖3還顯示了TAS5261參攷設計的PCB配寘.
數位放大器的新型高瓦數功率級有助於開發更加多樣化的產品和應用。 本文中描述的概念有助於克服高功率設計中遇到的主要挑戰。