PCB科技 - 為什麼在PCB設計中需要進行蛇形等距設計

為什麼在印刷電路板設計中需要進行蛇形等距設計

在裡面 印刷電路板設計, 等長記錄道主要用於一些高速並行匯流排.
由於這種類型的並行匯流排通常具有基於同一時鐘採樣的多個數據訊號, each clock cycle may need to be sampled twice (DDRSDRAM) or even 4 times. 隨著晶片工作頻率的新增, 訊號傳輸延遲影響定時的比例越來越大. In order to ensure that the value of all signals can be collected correctly at the data sampling point (the rising or falling edge of the clock), 必須控制訊號傳輸的延遲. 等長記錄道的目的是使 印刷電路板.
高速訊號的有效建立和維護視窗相對較小. 使數據和控制訊號落在有效視窗內, 數據之間的跟踪長度差异, 時鐘或數據, 控制訊號之間的距離非常小. 具體允許偏差可通過計算延時來獲得.

事實上, 一般來說, 順序邏輯訊號必須滿足設定時間和保持時間，並具有一定的裕度. 只要滿足此條件, 訊號的長度可能不完全相等.
然而, the actual situation is that for high-speed signals (such as DDR2, DDR3, FSB), it is impossible to know whether the timing meets the setup time and hold time requirements during the design (there are too many influencing factors, including the internal wiring and capacitance of the chip). 必須考慮負載引起的延遲差异, it is difficult to estimate the actual value through calculation), a controllable delay device must be set inside the chip (the delay is controlled by the register), 然後掃描寄存器的值以嘗試各種延遲. And by observing the signal (look at the waveform directly, and measure the setup and hold time) to determine the delay value to meet the setup time and hold time requirements. 然而, 通常僅在一條或幾條訊號線上觀察到相同類型的訊號. 為了使所有訊號滿足定時要求, 同一類型的訊號佈線長度必須嚴格相等.
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