PCB新聞 - PCB和電路板的特性阻抗ZO與工藝之間的關係

微帶線結構的特性阻抗Z0計算公式：Z0=87/r +14.1 ln5.98小時 / (0.8W+T)

Among 這個m: εr-permittivity H-dielectric thickness W-wire width T-wire thickness

這個 lower the εr of the board, 越容易新增 PCB電路 並匹配高速組件的輸出阻抗值.

1. The characteristic impedance Z0 is inversely proportional to the εr of the plate

Z0 increases as the thickness of the medium increases. 因此, 對於 高頻電路 具有嚴格的Z0, 對覆銅板基板的介電厚度誤差提出了嚴格要求. 通常地, 介質的厚度變化不得超過10%.

2, the influence of dielectric thickness on characteristic impedance Z0

With the increase of trace density, 介質厚度的新增會導致電磁干擾的新增. 因此, 用於高頻線和高速數位線的訊號傳輸線, 隨著導線佈線密度的新增, 應减小介質的厚度，以消除或减少電磁干擾引起的雜訊或串擾, 或大大降低εr. εr基板.

根據微帶線結構的特性阻抗Z0計算公式：Z0=87/r +1.41 ln5.98小時 / (0.8W+T)

Copper foil thickness (T) is an important factor affecting Z0. 導線厚度越大, Z0越小. 但其變化範圍相對較小.

3, the influence of copper foil thickness on characteristic impedance Z0

The thinner the thickness of the copper foil, Z0的值越高, 但厚度的變化對Z0的影響不大.

薄銅箔對Z0的貢獻比薄銅箔對製造細導線以改善或控制Z0的貢獻更準確.

According to the formula:

Z0 = 87/r +1.41 ln5.98小時 / (0.8W+T)

The smaller the line width W, Z0越大； 减小導線寬度可以新增特性阻抗. 線寬變化對Z0的影響比線寬變化更明顯.

4. The influence of wire width on characteristic impedance Z0

Z0 increases rapidly as the line width W becomes narrower. 因此, 至控制Z0, 必須嚴格控制線寬. 現時, most的訊號傳輸線寬W 高頻電路 高速數位電路為0.10或0.13毫米. 傳統上, 線寬控制偏差為±20%. The PCB導線 of conventional electronic products that are not transmission lines (wire length <1/7 of the signal wavelength) can meet the requirements, 但對於具有Z0控制的訊號傳輸線, the PCB導線 寬度偏差為±20%, 不再滿足要求. 因為此時Z0誤差已超過±10%.