對於 PCB複製板設計 主機板的, 各種類型訊號的路由是必須注意的一部分. 因為主機板上設計了多種類型的訊號, 各種訊號軌跡有不同的規格和要求, 確保主機板設計準確可行, 有必要深入瞭解各種訊號的軌跡. 在這裡, 我們詳細介紹了主機板設計中常見訊號類型的佈線規格和要求.
1, CPU wiring:
The wiring of the CPU is generally 5/10. 控制線的間距應稍大一些, 約20密耳.
<1>Data lines (0-63) 64 pieces;
<2>Address line (3-31) REQ(0-4) etc.
<3>Control line (generally distributed between the data line 和 the address line)
When the data lines are routed, 每16行分組在一起,並在同一層上運行.
(0-15) (16-31) (32-47) (48-63) and each group distributes 2-3 control lines,
當地址線被路由時, 每16行分組在一起,並在同一層上運行. The difference is that the Address lines are not from (3-31) before (0-2). 一般分為2組,
<1>(3-16) Add 5 REQ lines, 18;
<2>(17-31) 16 pieces;
When the CPU signal is routed, 應使用20-30mil接地線將其與其他訊號分離, 例如DDR訊號, 便於使用通孔下方的內部GND,並起到接地作用.
2, DDR signal:
In addition to the Control line, DDR線通常為5/10控制線,以保持20mil的線間距. 比如CPU, it is mainly divided into the following three categories:
<1>Data line (0-63) 64 lines
<2>Address line (0-13) There are also some address signal lines with other names,
<3>Control line (generally distributed between the data and address lines)
When the Data line is routed, 每8行為一組, 加上2條DQM和DQS控制線,一起走在同一層上. The main grouping methods are:
MD (0-7) add DQM0 DQS0
MD (8-15) plus DQM 1 DQS 1
MD (16-23) plus DQM 2 DQS 2
MD (24-31) plus DQM3 DQS 3
MD (32-39) plus DQM 4 DQS 4
MD (40-47) plus DQM 5 DQS 5
MD (48-55) plus DQM 6 DQS 6
MD (56-63) plus DQM 7 DQS 7
Address lines are all together as much as possible;
In addition, DDR部分中有3對CLK線. 如果是雙通道DDR, 有6對CLK線路. CLK應配對,並與其他訊號保持至少20密耳的距離.
DDR, 比如CPU, 還應使用20-30mil接地訊號與其他訊號分離, mainly the CPU and AGP signals
3, CLK signal:
The CLK signal is an important signal in the motherboard, generally as large as the following:
<1>200 trillion
<2>100 trillion
<3>66 trillion
<4>48 trillion
<5>16 trillion
The above is the introduction of various signal routing requirements and techniques for PCB複製板設計. Ipcb還提供 PCB製造商 and PCB製造 科技.