IC Substrate - PCB board manufacturers introduce what is HDI IC packaging substrate

HDI IC package substrate

lga PCB (LGA IC package substrate)

Product name: HDI IC package substrate

Board material: Mitsubishi Gas Halogen-free BT HL832NX-A-HS

Minimum line width/line distance: 30/30um

Surface technology: nickel palladium gold (ENEPIG)

Board thickness: 0.3mm

Number of floors: 4 floors

Hole diameter: laser hole 0.075mm, mechanical hole 0.1mm

Use: BGA IC package substrate

Features of Mitsubishi Gas BT material

Features of Mitsubishi Gas BT material

WLP, WLCSP are small in size and light in weight

But here comes the problem. Although WLP and WLCSP are quite small in size, with the increasing number of pins of conventional ICs, the ball pitch requirements for WLP and WLCSP packages tend to be strict, but the electrical properties required for circuit design Basically, it is not different from the electrical support required by general ICs, but the size of WLP and WLCSP has been reduced to the die size. In addition, the contacts and circuits that can be connected to the PCB with WLP and WLCSP are extremely small. In the design of PCB The solution is not as easy as the general IC application solution.

As for the use of wafer-level packaging, the purpose is to reduce the cost and overall size of the solution, but when the wafer-level packaging is introduced, the cost of the PCB is bound to be due to the use of wafer-level packaging, and corresponding wiring must be carried out. With the improvement of the punching process, the PCB characteristics can be fully matched with WLP and WLCSP components without connection problems. Especially after WLP and WLCSP are used in the design scheme, PCB will become more complicated and its role will become more important. Careful planning is required during the design to avoid the stability of the terminal product caused by the quality of the PCB.

When we are designing the carrier board, basically in the existing design products, the available carrier board area has become smaller and smaller, and engineers have to face the continuously shrinking design requirements, for example, wearable electronic products, For electronic circuits such as watches and mobile phones, the usable carrier board space is extremely precious. In order to reduce the PCB area used in terminal design, the introduction of smaller IC packages such as WLP and WLCSP is an unavoidable design trend.

Component packaging at the wafer stage greatly saves the footprint of the carrier board

Since WLP and WLCSP packaging are directly built on the "silicon" substrate packaging process, IC basically does not need to use bonding wires, for high-frequency components, it can directly obtain better high-frequency electrical properties, and achieve the benefit of shortening the cycle time. And because the packaging can be completed in the fab, and the packaging cost can be saved at the same time, but for engineers, the design plan must also be considered in the direction of reducing costs. To match WLP and WLCSP components, the PCB cost must also be limited to a certain extent. Pay attention to the trade-off design, or adopt the corresponding circuit layout.

Generally speaking, to import WLP and WLCSP components, engineers must first obtain the footprint of WLP and WLCSP (ie package size) before implementing PCB circuit layout planning, and at the same time confirm the size/contact error and contact of WLP and WLCSP components The key information of components such as pitch, start circuit layout, process component placement, you can use the obtained component parameters to design and plan, and because the size and contact of WLP and WLCSP become smaller, it is necessary to consider the soldering of applicable IC pins. Mat design.

PCB needs to be fine-tuned for SMD and NSMD forms

It can be matched with WLP and WLCSP pad types, and Solder Mask Defined (SMD) and Nonsolder Mask Defined (NSMD) can be used. The solder mask definition type SMD solder pad is designed to use the solder mask to define the solder ball and the area of the solder pad to be soldered. This design solution can reduce the possibility that the solder pad may be pulled up during the soldering or desoldering process. But the disadvantage of the SMD form is that SMD reduces the surface area of the copper surface connected with the solder ball, and at the same time reduces the space between the adjacent pads, which will limit the width of the trace between the pads and may also cause the PCB to be turned on. The hole uses elasticity. In most design schemes, the more commonly used one is still the SMD design scheme, because the soldering pads of the SMD can have better solder connection characteristics, and the solder and the soldering pads can be integrated together during the manufacturing process.

As for the non-solder mask-defined solder pad (NSMD), the design method is to use copper for solder bump soldering to define the solder pad area. This design solution can provide a larger surface area to connect the PCB and the solder ball. At the same time, NSMD Compared with the SMD design form, it also provides a larger insulation distance between the soldering pads and the soldering pads, which allows a wider wiring spacing between the soldering pads, and has higher flexibility for the use of through holes of the PCB. However, if the NSMD is soldering, Desoldering and other operations can easily cause the solder pad to be pulled up.

Special consideration is required for spacing

The consideration of the pitch size is also very important, especially when the PCB is in the form of SMD or NSMD, the reserved pitch size of different solutions will also be slightly different, and the pitch size refers to the distance between the solder balls, which is two The distance between the centers of the solder balls, and the larger the pitch size, the larger the wiring space between the solder pads and the solder pads that can be used for wiring.

For the 0.5 mm design scheme, due to the larger spacing, more wiring space is provided, or the design can use wider lines and more copper materials, which means that higher transmission currents can be driven in the traces, and the insulation Distance can also easily complete the design. For the insulation distance, generally need to check the required design specifications, the general insulation distance is 3~3.5 mils (mil). Compared with the 0.4 mm pitch width design, it is more difficult to design, because the available wiring space is more flexible, and the available insulation pitch will be reduced at the same time due to the shrinking pitch. This represents the copper change that can be used in the circuit. If it is less, the transmitted drive current will be correspondingly reduced.

In terms of PCB wiring, due to the characteristics of WLP and WLCSP components, the available solder ball pitch is quite small. Basically, it is impossible to use mechanical hole-opening equipment to make PCB holes. Because the hole diameter of mechanical holes is too large, the hole-opening process may also make the PCB The upper thinner line is damaged due to errors in the hole-opening process. However, in PCBs that use WLP and WLCSP components, because the circuits are much tighter, laser-drilled vias, which are more costly, will be used instead.

Generally speaking, only medium and high unit price terminal products will use high-cost laser perforation PCB production solutions, and laser perforation will also be used with multi-layer boards for production, and the cost will be more than four layers. The board is much taller. For some low-cost applications, it is basically not cost-effective to use a multilayer board and a laser opening design. Another relatively uncommon design solution is to use a staggered bump array of WLP components, which can be used to stagger the solder balls on the WLP chip, allowing product developers to fight for more available space. Carry out the PCB circuit layout. But in fact, the cost of WLP with staggered bump array is quite high. At the same time, this solution must be considered simultaneously when WLP and WLCSP components are developed. The difficulty of component production is high, which will increase component cost.

Concluding remarks

Wafer-level chip size packaging of WLP and WLCSP components has an excellent improvement benefit for reducing the size of the end product, but in exchange for the PCB design plan must also be upgraded simultaneously, with high-density multilayer boards and precision manufacturing processes of laser openings During development, the carrier space and component cost originally saved by IC components will be partly transferred to PCB design and subsequent mass production. Instead, smaller components will be used in the production line of the product. Processing or maintenance will also cause some operational problems that are more difficult to implement, which must be considered one by one before the relevant design.

WLP and WLCSP components are wafer-level chip size packages. The final IC appearance and package size are almost the same as those of the chip. Wafer-level chip size packaging has many advantages, such as a significant reduction in component size, which reduces conventional ICs. Due to the area and thickness, the weight of the components is lighter, and the components can be made by automatic feeding and parting that is more suitable for mass production line production, which can reduce the overall production cost, and even the electrical characteristics of WLP and WLCSP components themselves for high-frequency applications The performance will be better. It is used in mobile devices that need to be lightweight and reduced in size, such as mobile phones, notebook computers, and wearable smart products. They can all be used to greatly reduce the area of the carrier and the weight of the product. If WLP and WLCSP components can be more integrated for wafer-level packaging technology before the introduction, such as with rewiring layer technology, bumps, etc. to improve the design of WLP and WLCSP components, the combination of WLP, WLCSP components and PCB can be integrated in The design is easier.