Q: When there are both RF small signals and high-speed clock signals in a system, we usually use separate digital/analog layouts to reduce electromagnetic interference through physical isolation, filtering, etc. However, this is important for miniaturization, high integration and reduction The processing cost of the small structure is of course unfavorable, and the effect is still not satisfactory, because whether it is a digital ground or an analog ground point, it will eventually be connected to the chassis ground, so that the interference is coupled to the front end through the ground, which is a very headache for us. Questions, I would like to ask experts about measures in this regard.
A: The situation of both RF small signal and high-speed clock signal is more complicated. The cause of interference needs to be carefully analyzed and different methods should be tried accordingly. According to the specific application, you can try the following methods.
A. When there is a small RF signal and a high-speed clock signal, the power supply must be separated first. Switching power supply is not suitable, and linear power supply can be used.
B. Choose one of RF small signal and high-speed clock signal, and use shielded cable for connection. It should be ok.
C. Connect the digital ground point to the ground of the power supply (requires good isolation of the power supply), and connect the analog ground point to the chassis ground.
D. Try to use filtering to remove interference.
Q: If EMC is considered in circuit board design, it will definitely increase a lot of costs. How can I answer the EMC requirements as much as possible without putting too much cost pressure? Thank you.
A: In practical applications, only relying on the printed board design cannot solve the problem fundamentally, but we can improve it through the printed board. Reasonable device layout, mainly the placement of inductive devices, should be as short as possible Wiring connection and reasonable grounding distribution. If possible, connect the Chassis ground of all devices on the board with a special layer, and design special joints that are tightly connected to the equipment shell. When choosing a device, it should be low instead of high, and use the principle of slow instead of fast.
Q: I hope the PCB:
1. Automatic wiring of PCB.
2. (1) + thermal analysis
3. (1) + timing analysis
4. (1) + impedance analysis
5.(1)+(2)+(3)
6.(1)+(3)+(4)
7.(1)+(2)+(3)+(4)
How should I choose to get the best price/performance ratio. I hope the PLD aspect: VHDL programming--"simulation--"synthesis--" download and other steps, is it better to use separate tools? Or use the integrated environment provided by the PLD chip manufacturer?
A: In the current PCB design software, thermal analysis is not a strong point, so it is not recommended to use it. For other functions 1.3.4, you can choose PADS or Cadence. The cost performance is good.
Beginners in PLD design can use the integrated environment provided by PLD chip manufacturers, and can use single-point tools when designing more than one million gates.
Q: What issues should be paid attention to in PCB design?
A: The issues that need to be paid attention to when designing PCB vary with the application products. It's like the difference between digital circuit and simulation circuit. The following are just a few general principles to be noted.
1. The decision of PCB stacking; including the arrangement of power layer, ground layer, wiring layer, and the wiring direction of each wiring layer. These will affect signal quality and even electromagnetic radiation problems.
2. The traces and vias related to power and ground should be as wide as possible and as large as possible.
3. Regional configuration of circuits with different characteristics. A good area configuration has a considerable bearing on the difficulty of routing and even the signal quality.
4. Set up DRC (Design Rule Check) and test-related designs (such as test points) in accordance with the manufacturing process of the production plant.
Other electrical-related issues that need to be paid attention to are absolutely related to the circuit characteristics. For example, even if they are all digital circuits, whether to pay attention to the characteristic impedance of the trace depends on the speed of the circuit and the length of the trace.
Q: In high-speed PCB design, the software we use is only to check the EMC and EMI rules that have been set, and the designer should consider the EMC and EMI rules from those aspects. How to set the rules? I use CADENCE The company's software.
A: General EMI/EMC design needs to consider both radiated and conducted aspects. The former belongs to the higher frequency part (>30MHz) and the latter is the lower frequency part (<30MHz). So you can't just pay attention to the high frequency and ignore the low frequency part.
A good EMI/EMC design must take into account the location of the device, PCB stack arrangement, important connection method, device selection, etc. at the beginning of the layout. If there is no better arrangement beforehand, it will be solved afterwards. It will double the effort and increase the cost. For example, the location of the clock generator should not be as close as possible to the external connector. High-speed signals should be routed to the inner layer as much as possible. Pay attention to the characteristic impedance matching and the continuity of the reference layer to reduce reflections. The slope of the signal pushed by the device (slew rate) ) Is as small as possible to reduce high-frequency components. When choosing decoupling/bypass capacitors, pay attention to whether its frequency response meets the requirements to reduce power layer noise. In addition, pay attention to the return path of high-frequency signal current to make the loop area as small as possible (also It means that the loop impedance is as small as possible to reduce radiation. The ground layer can also be divided to control the range of high-frequency noise. Finally, the chassis ground between the PCB board and the housing should be selected appropriately.