PCB News - 3 misunderstandings of wiring in PCB Layout

Layout is one of the most basic job skills for PCB design engineers. The quality of the wiring will directly affect the performance of the entire system. Most high-speed design theories must be finally implemented and verified through Layout. It can be seen that wiring is very important in high-speed PCB design. The following will analyze the rationality of some situations that may be encountered in actual wiring, and give some more optimized routing strategies. It is mainly explained from three aspects: right-angle wiring, differential wiring, and serpentine wiring.

1. Right-angle routing

Right-angle wiring is generally a situation that needs to be avoided as much as possible in PCB wiring, and it has almost become one of the standards for measuring the quality of wiring. So how much influence will the right-angle wiring have on signal transmission? In principle, right-angle routing will change the line width of the transmission line, causing discontinuity in impedance. In fact, not only right-angle routing, but also corners and acute-angle routing may cause impedance changes. The influence of right-angle wiring on the signal is mainly reflected in three aspects: one is that the corner can be equivalent to a capacitive load on the transmission line, which slows down the rise time; the other is that impedance discontinuity will cause signal reflection; the third is that the right-angle tip is generated EMI.

The parasitic capacitance caused by the right angle of the transmission line can be calculated by the following empirical formula:

C=61W(Er)1/2/Z0

In the above formula, C refers to the equivalent capacitance of the corner (unit: pF), W refers to the width of the trace (unit: inch), εr refers to the dielectric constant of the medium, and Z0 is the characteristic impedance of the transmission line. For example, for a 4Mils 50 ohm transmission line (εr is 4.3), the capacitance brought by a right angle is about 0.0101pF, and then the rise time change caused by this can be estimated:

T10-90%=2.2*C*Z0/2=2.2*0.0101*50/2=0.556ps

It can be seen through calculation that the capacitance effect brought by the right-angle trace is extremely small.

As the line width of the right-angle trace increases, the impedance there will decrease, so a certain signal reflection phenomenon will occur. We can calculate the equivalent impedance after the line width increases according to the impedance calculation formula mentioned in the transmission line chapter, and then Calculate the reflection coefficient according to the empirical formula: ρ=(Zs-Z0)/(Zs+Z0). Generally, the impedance change caused by right-angle wiring is between 7%-20%, so the maximum reflection coefficient is about 0.1. Moreover, as can be seen from the figure below, the impedance of the transmission line changes to the minimum within the length of the W/2 line, and then returns to the normal impedance after the time of W/2. The entire impedance change time is extremely short, often within 10ps. Inside, such fast and small changes are almost negligible for general signal transmission.

Many people have this understanding of right-angle wiring. They think that the tip is easy to transmit or receive electromagnetic waves and generate EMI. This has become one of the reasons why many people think that right-angle wiring cannot be used. However, many actual test results show that right-angled traces will not produce obvious EMI than straight lines. Perhaps the current instrument performance and the test level restrict the accuracy of the test, but at least it illustrates a problem. The radiation of the right-angled wiring is already smaller than the measurement error of the instrument itself.

Generally speaking, the right-angle routing is not as terrible as imagined. At least in applications below GHz, any effects such as capacitance, reflection, EMI, etc. are hardly reflected in TDR testing. High-speed PCB design engineers should still focus on layout, power/ground design, and wiring design. Via holes and other aspects. Of course, although the impact of right-angle wiring is not very serious, it does not mean that we can all use right-angle wiring in the future. Attention to detail is the basic quality that every good engineer must have. Moreover, with the rapid development of digital circuits, PCB The frequency of the signal processed by engineers will continue to increase. In the field of RF design above 10GHz, these small right angles may become the focus of high-speed problems.

2. Differential routing

Differential signal (DifferentialSignal) is more and more widely used in high-speed circuit design. The most critical signal in the circuit is often designed with a differential structure. What makes it so popular? How to ensure its good performance in PCB design? With these two questions, we proceed to the next part of the discussion. What is a differential signal? In layman's terms, the driving end sends two equal and inverted signals, and the receiving end judges the logical state "0" or "1" by comparing the difference between the two voltages. The pair of traces carrying differential signals is called differential traces.

Compared with ordinary single-ended signal traces, differential signals have the most obvious advantages in the following three aspects:

a. Strong anti-interference ability, because the coupling between the two differential traces is very good. When there is noise interference from the outside, they are almost coupled to the two lines at the same time, and the receiving end only cares about the difference between the two signals. Therefore, the external common mode noise can be completely canceled.

b. It can effectively suppress EMI. For the same reason, due to the opposite polarity of the two signals, the electromagnetic fields radiated by them can cancel each other out. The tighter the coupling, the less electromagnetic energy vented to the outside world.

c. The timing positioning is accurate. Because the switch change of the differential signal is located at the intersection of the two signals, unlike the ordinary single-ended signal, which depends on the high and low threshold voltages to determine, it is less affected by the process and temperature, which can reduce the error in the timing., But also more suitable for low-amplitude signal circuits. The current popular LVDS (lowvoltagedifferentialsignaling) refers to this small amplitude differential signal technology.

For PCB engineers, the most concern is how to ensure that these advantages of differential wiring can be fully utilized in actual wiring. Perhaps anyone who has been in touch with Layout will understand the general requirements of differential wiring, that is, "equal length and equal distance". The equal length is to ensure that the two differential signals maintain opposite polarities at all times and reduce the common mode component; the equal distance is mainly to ensure that the differential impedances of the two are consistent and reduce reflections. "As close as possible" is sometimes one of the requirements of differential wiring. But all these rules are not used to mechanically apply, and many engineers seem to still not understand the essence of high-speed differential signal transmission. The following focuses on several common misunderstandings in PCB board differential signal design.

Misunderstanding 1: It is believed that the differential signal does not need a ground plane as a return path, or that the differential traces provide a return path for each other. The reason for this misunderstanding is that they are confused by superficial phenomena, or the mechanism of high-speed signal transmission is not deep enough. It can be seen from the structure of the receiving end of Figure 1-8-15 that the emitter currents of transistors Q3 and Q4 are equal and opposite, and their currents at the ground exactly cancel each other (I1=0), so the differential circuit is Similar bounces and other noise signals that may exist on the power and ground planes are insensitive. The partial return cancellation of the ground plane does not mean that the differential circuit does not use the reference plane as the signal return path. In fact, in the signal return analysis, the mechanism of differential wiring and ordinary single-ended wiring is the same, that is, high-frequency signals are always Reflux along the loop with the smallest inductance. The biggest difference is that in addition to the coupling to the ground, the differential line also has mutual coupling. Which kind of coupling is strong will become the main return path. 1-8-16 is a schematic diagram of the geomagnetic field distribution of single-ended signals and differential signals.

In PCB circuit design, the coupling between differential traces is generally small, often only accounting for 10 to 20% of the coupling degree, and more is the coupling to the ground, so the main return path of the differential trace still exists on the ground plane . When the ground plane is discontinuous, the coupling between the differential traces will provide the main return path in the area without a reference plane, as shown in Figure 1-8-17. Although the influence of the discontinuity of the reference plane on the differential trace is not as serious as that of the ordinary single-ended trace, it will still reduce the quality of the differential signal and increase EMI, which should be avoided as much as possible. Some designers believe that the reference plane under the differential trace can be removed to suppress some common mode signals in differential transmission. However, this approach is not desirable in theory. How to control the impedance? Not providing a ground impedance loop for the common-mode signal will inevitably cause EMI radiation. This approach does more harm than good.

Misunderstanding 2: It is believed that keeping equal spacing is more important than matching line length. In actual PCB layout, it is often not possible to meet the requirements of differential design at the same time. Due to the existence of pin distribution, vias, and wiring space, the purpose of line length matching must be achieved through proper winding, but the result must be that some areas of the differential pair cannot be parallel. What should we do at this time? Which choice? Before drawing conclusions, let's take a look at the following simulation results.

From the above simulation results, it can be seen that the waveforms of Scheme 1 and Scheme 2 are almost coincident, that is to say, the influence caused by the unequal spacing is minimal. In comparison, the influence of the line length mismatch on the timing is much greater. (Scheme 3). From the theoretical analysis, although the inconsistent spacing will cause the differential impedance to change, because the coupling between the differential pair itself is not significant, the impedance change range is also very small, usually within 10%, which is only equivalent to one pass. The reflection caused by the hole will not have a significant impact on signal transmission. Once the line length does not match, in addition to the timing offset, common mode components are introduced into the differential signal, which reduces the quality of the signal and increases EMI.

It can be said that the most important rule in the design of PCB differential traces is the matching line length. Other rules can be flexibly handled according to design requirements and actual applications.

Misunderstanding 3: It is believed that the differential wiring must be very close. Keeping the differential traces close is nothing more than to enhance their coupling, which can not only improve immunity to noise, but also make full use of the opposite polarity of the magnetic field to offset electromagnetic interference to the outside world. Although this approach is very beneficial in most cases, it is not absolute. If we can ensure that they are fully shielded from external interference, then we do not need to use strong coupling to achieve anti-interference. And the purpose of suppressing EMI. How can we ensure good isolation and shielding of differential traces? Increasing the spacing with other signal traces is one of the most basic ways. The electromagnetic field energy decreases with the square of the distance. Generally, when the line spacing exceeds 4 times the line width, the interference between them is extremely weak. Can be ignored. In addition, isolation by the ground plane can also play a good shielding role. This structure is often used in high-frequency (above 10G) IC package PCB design. It is called a CPW structure, which can ensure strict differential impedance. Control (2Z0), as shown in Figure 1-8-19.

Differential traces can also run in different signal layers, but this method is generally not recommended, because the differences in impedance and vias produced by different layers will destroy the effect of differential mode transmission and introduce common mode noise. In addition, if the adjacent two layers are not tightly coupled, it will reduce the ability of the differential trace to resist noise, but if you can maintain a proper distance from the surrounding traces, crosstalk is not a problem. At general frequencies (below GHz), EMI will not be a serious problem. Experiments have shown that the attenuation of radiated energy at a distance of 500 mils from the differential trace has reached 60dB at a distance of 3 meters, which is enough to meet the FCC electromagnetic radiation standard, so The designer does not have to worry too much about the electromagnetic incompatibility caused by insufficient differential line coupling.

3. Serpentine line

Snake line is a type of routing method often used in Layout. Its main purpose is to adjust the delay to meet the system timing design requirements. The designer must first have this understanding: the serpentine line will destroy the signal quality, change the transmission delay, and try to avoid using it when wiring. However, in actual design, in order to ensure that the signal has sufficient hold time, or to reduce the time offset between the same group of signals, it is often necessary to deliberately wind the wire. So, what effect does the serpentine line have on signal transmission? What should I pay attention to when wiring? The two most critical parameters are the parallel coupling length (Lp) and the coupling distance (S), as shown in Figure 1-8-21. Obviously, when the signal is transmitted on the serpentine trace, the parallel line segments will be coupled in a differential mode. The smaller the S and the larger the Lp, the greater the degree of coupling. It may cause the transmission delay to be reduced, and the signal quality is greatly reduced due to crosstalk. The mechanism can refer to the analysis of common mode and differential mode crosstalk in Chapter 3. The following are some suggestions for Layout engineers when dealing with serpentine lines:

1. Try to increase the distance (S) of parallel line segments, at least greater than 3H, H refers to the distance from the signal trace to the reference plane. In layman's terms, it is to go around a big bend. As long as S is large enough, the mutual coupling effect can be almost completely avoided.

2. Reduce the coupling length Lp, when the double Lp delay approaches or exceeds the signal rise time, the crosstalk generated will reach saturation.

3. The signal transmission delay caused by the serpentine line of the Strip-Line or Embedded Micro-strip is less than that of the Micro-strip. In theory, the stripline will not affect the transmission rate due to differential mode crosstalk.

4. For high-speed signal lines and those with strict timing requirements, try not to use serpentine lines, especially in small areas.

5. You can often use serpentine traces at any angle, such as the C structure in Figure 1-8-20, which can effectively reduce mutual coupling.

6. In high-speed PCB design, the serpentine line has no so-called filtering or anti-interference ability, and can only reduce the signal quality, so it is only used for timing matching and has no other purpose.

7. Sometimes you can consider spiral routing for winding. Simulation shows that its effect is better than normal serpentine routing.