High-performance PCB design is inseparable from the support of advanced EDA tool software. Cadence's PSD series has powerful functions in high-speed PCB design. Its front and rear simulation modules ensure signal quality and improve the first-time success rate of the product; its use of physical and electrical rules can intelligently realize such as differential wiring, isometric control, etc. Technical requirements; support parallel design, shorten development time; support module reuse, pay attention to technology precipitation, ensure design quality and improve design efficiency. With a high-performance EDA tool software, and with experienced PCB design engineers, the realization of high-performance PCB design is guaranteed.
1. Essential hardware foundation
Since PCB design entered the high-speed era, the momentum of signal integrity knowledge based on transmission line theory has overshadowed basic hardware knowledge. It has been suggested that the hardware design ten years later will only be front-end and back-end. It is enough to have a system engineer integrate them. It is easy to doubt the necessity of learning the basics of hardware. In fact, whether you are an IC engineer or a PCB engineer, you must have knowledge such as R, L, C and basic gate circuits. High-performance PCB design is inseparable from the basic knowledge of power supply, and the common sense of FPGA is indispensable. Even signal integrity analysis based on transmission line theory is considered from the study of R, L, and C-based micro elements. PCB design engineers must have basic circuit knowledge, such as high frequency, low frequency, digital circuit, microwave, electromagnetic field and electromagnetic wave. Familiar with and understand the basic functions and basic hardware knowledge of the designed product is the basic condition to complete a high-performance PCB design.
Second, the high-speed challenge
As the signal rate continues to increase, signal integrity continues to plague R&D personnel, including bus drive capability, signal reflection, crosstalk, overshoot, oscillation, back groove, attenuation, etc.; sometimes the timing is also classified into the scope of signal integrity Inside. Signoise, a simulation module based on the IBIS model in Allegro, can easily build a topology for simulation. This Allegro simulation tool has a good interface with the wiring platform. After the PCB wiring is completed, the wiring parameters can be directly extracted from the PCB board to the Signoise platform, and post-simulation is performed to verify the effect of the wiring. The wiring constraints extracted by simulation can be directly imported into Allegro's electrical rule manager. This manager can conveniently constrain the equal length rules of the timing requirements. During wiring, when the length does not meet the specified rules, Allegro can be real-time Carry out an alert.
Third, the challenge of power supply and ground noise
The power and ground planes are used as reference planes and return channels for signal lines, and the noise from the power and ground will directly enter the signal using them as the reference plane. Solving the problem of power and ground noise is not only to consider the power supply's own level stability problem, but also an important factor in solving the reliability problem of high-speed signals. The power supply design of high-speed PCB must first clarify the power tree and analyze the rationality of the power supply channel.
First of all, in the current-carrying capacity of large currents, the appropriate wiring width must be allocated under the premise of considering the margin; at the same time, because the actual wiring has resistance, there is a voltage drop on the route from the power supply output to the actual load, and the high-speed circuit The voltage of the device, especially the core voltage, is often very low, and the voltage drop has a direct impact on the power supply effect. Current carrying capacity is related to line width, inner and outer layers, copper thickness, and allowable temperature rise. Secondly, in the filtering effect of the power supply, the impedance of the power supply needs to be considered. Because the power channel is actually not an ideal channel, but has resistance and impedance, the high-speed circuit needs instant power supply when the gate circuit flips, and the current from the power module to provide energy for each gate circuit flips requires path distribution at all levels. Yes, it takes time, which can be understood as a staged charging process,
Four, EMC issues:
With the improvement of people's living standards and the concern for environmental protection including electromagnetic pollution, EMC issues have become an inevitable bend in the research and development of all electronic products. As a "Black Magic", EMC problems increasingly plague developers. EMC must be designed from the source. As the source of product EMC, the EMC performance of single board/PCB has attracted more and more attention. Among the many EMC indicators, the problem of RE indicator is the most headache for hardware engineers. Due to the limitation of the model, even the top EMC simulation software recognized in the industry can not simulate the data comparable to the actual test data. It can only give a simplified radiation field distribution of a single radiation source under certain specific conditions, and then provide a design reference.
Five, the challenge of DFM
To solve the DFM problem, in addition to the single board process engineer formulating process standards suitable for the company, it is necessary to conduct systematic and comprehensive DFM common sense training for PCB design engineers. PCB engineers need to constantly understand the current status of PCB production and processing capabilities in the industry and combine the company’s actual conditions. Circumstances, select the appropriate process route and design parameters. Comprehensive consideration is given to the trade-off between electrical performance and DFM. In addition, in the PCB packaging library, there must be a full-time library building staff to solve the DFM problem from the source. Allegro has a dedicated library building module, which can conveniently design the package library and the pads of the package library according to the datasheet of the device. Good package design is the basis of DFM design.