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PCB Technical - Introduction of copper plating process technology for PCB circuit board electroplating processing

PCB Technical

PCB Technical - Introduction of copper plating process technology for PCB circuit board electroplating processing

Introduction of copper plating process technology for PCB circuit board electroplating processing

2021-10-07
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Author:Aure

Introduction of copper plating process technology for PCB circuit board electroplating processing




The main feature of the electroplated hole copper plating processing technology used by the circuit board manufacturers to produce the multilayer impedance circuit board is the blind and buried vias of the micro vias formed in the "core board" of the multilayer PCB circuit board. The micro-vias are required to achieve interlayer electrical interconnection through boring and copper electroplating. The most critical aspect of this blind buried hole for hole metallization and electroplating is the access and replacement of the electroplating solution.

Circuit board manufacturers manufacture multi-layer PCBs by coating or laminating a dielectric layer (or resin-coated copper foil) on the surface of the "core board" and forming micro-vias. These micro vias formed by layering on the "core board" are made by methods such as photoinduced method, plasma method, laser method and sandblasting method (mechanical method, including numerical control drilling method not introduced, etc.) Made. These micro-vias on multi-layer PCB circuit boards need to be metallized and copper electroplated to achieve electrical interconnection between PCB layers. This section mainly introduces the characteristics and requirements of micro-vias in PCB boards during boring and electroplating.

Introduction of copper plating process technology for PCB circuit board electroplating processing


For through holes, if it is a vertical hole plating, the PCB manufacturer can swing, vibrate, stir the plating solution, or spray flow in the plate making fixture (or hanger) to make the PCB on the two plates of the plate. There is a hydraulic pressure difference between them. This hydraulic pressure difference will force the plating solution into the hole and drive away the gas in the hole to fill the hole. For high aspect ratio (thickness to diameter ratio: the ratio of the thickness of the dielectric layer to the micro-via hole) Small holes, the existence of this hydraulic pressure difference is more important, and then pore formation or electroplating is carried out. During pore electroplating, part of the Cu2+ ions in the plating solution in the hole must be consumed. Therefore, the Cu2+ concentration of the plating solution in the hole is getting lower and lower, and the efficiency of pore forming or electroplating will become smaller and smaller. In addition to the effect of the plating fluid in the through hole (such as a "laminar flow" phenomenon, etc.) and the uneven current density distribution (the electric current density in the hole is much lower than the current density on the plate surface), therefore, the center of the hole The thickness of the coating is always lower than the thickness of the coating at the board surface. In order to reduce this difference in plating thickness, the most fundamental method is: one is to increase the flow rate of the plating solution in the hole or the number of exchanges of the plating solution in the hole per unit time (assuming that the plating solution is changed again and again, it is actually complicated Much, but this assumption can explain the problem); the second is to increase the current density in the hole, which is obviously difficult or impossible, because increasing the current density of the plating solution in the hole is bound to be Increasing the current density of the plate surface, as a result, it will cause a greater difference between the thickness of the plating layer in the center of the hole and the thickness of the plate surface; the third is to reduce the current density during electroplating and the concentration of Cu2+ ions in the plating solution, and at the same time Increase the flow rate of the plating solution in the hole (or the number of exchanges of the plating solution), in this way, can reduce the difference of Cu2+ ion concentration in the plating solution between the plate surface and the hole (referring to the difference between partial consumption of Cu2+ and replacement of the plating solution. Cu2+ concentration difference), this measure and method can improve the difference between the thickness of the plating layer on the board and the plating layer in the hole (at the center), but it is often at the expense of PCB productivity (yield), which is again undesirable. Fourth, the use of pulse electroplating method, according to different high-thickness-to-diameter ratio microvias, the corresponding pulse current electroplating method {can significantly improve the difference between the PCB board surface plating and the thickness of the plating layer in the hole, Even the same coating thickness can be achieved. Are these measures applicable to the hole plating of micro-vias in multi-layer PCB circuit boards?

As mentioned earlier, the pore plating of micro-vias in multilayer circuit boards is carried out in blind holes. When the hole depth of the blind holes is small or the thickness-to-diameter ratio is small, practice has shown that the above-mentioned four kinds of electroplating The measures can get good results. However, when the depth of the blind hole is high or the ratio of thickness to diameter is large, how reliable is the plating of micro vias? In other words, how to control the depth of the blind hole or the appropriate degree of thickness to diameter ratio of the multilayer circuit board?

As for the use of horizontal hole plating to process micro-vias in multilayer PCBs, there is no detailed report, but one can imagine that for PCB thickness-to-diameter ratios, horizontal hole plating is used. Reliable electrical interconnection should be available. For blind vias with a larger aspect ratio, the blind vias on the lower surface of the multilayer circuit board are difficult to drive off the gas in the hole, and it is even difficult for the plating solution to enter the hole, let alone There is a problem with the exchange of plating solution in the hole, unless the plate surface is regularly turned over.

To sum up, according to the basic characteristics and basic principles of the holeization and electroplating processing of the above multilayer PCB board, we can conclude that the blind and buried vias in the multilayer circuit board are processed by horizontal hole plating (especially the Large aspect ratio, such as aspect ratio>0.8), is far inferior to the effect of vertical hole electroplating.