PCB Blog - A High-speed DSP PCB Board Anti-jamming Design Technology

In terms of printed circuit boards applications, BGA packages have the characteristics of high success rate, low repair rate and high reliability, and are more and more widely used. That is, board-level design involves a lot of high-speed digital circuit design techniques. In high-speed systems, the generation of noise interference is the influencing factor, and high-frequency circuits also generate radiation and collisions, while faster edge rates generate ringing, reflections, and crosstalk. If the particularity of high-speed signal layout and wiring is not considered, the designed circuit board will not work properly. Therefore, the successful design of the PCB board is a very critical link in the DSPs circuit design process.

1. Transmission line effect
1.1 Signal Integrity
Signal integrity mainly includes reflection, ringing, ground bounce and crosstalk. The traces on the PCB can be equivalent to the series and parallel structures of capacitors, resistors and inductors shown in Figure 1. Typical value of series resistance 0.25D./R-4). 55DJft, the parallel resistance is usually very high. After adding parasitic resistance, capacitance and inductance to the actual PCB connection, the final impedance on the connection is called the characteristic impedance zo. If the impedance of the transmission line and the receiving end do not match, this can cause reflections and oscillations of the signal. Equivalent circuit of PCB traces: Changes in routing geometry, incorrect wire termination, transmission through connectors, and discontinuities in the power plane can all cause reflections. Overshoot and undershoot are generated when the signal changes on the rising and falling edges of the level, which will instantly generate glitches higher or lower than the stable level, which can easily damage the device. Ringing and ringing of the signal are caused by improper inductance and capacitance on the line, respectively. Ringing can be reduced by proper termination. When there is a large current surge in the circuit, it will cause ground bounce. If a large transient current flows through the power plane of the chip and the board, the parasitic inductance and resistance between the chip package and the power plane will cause power supply noise. . Crosstalk is a coupling problem between two signal lines, and the mutual inductance and mutual capacitance between the signal lines cause noise on the line. Capacitive coupling induces coupling current, while inductive coupling induces coupling voltage. The parameters of the PCB layer, the distance between the signal lines, the electrical characteristics of the driving end and the receiving end, and the wire termination method all have a certain influence on the crosstalk.

1.2 Solution
Some measures to be taken to solve common problems: The power plane does not restrict the direction of current flow, and the return line can follow the path of impedance, that is, close to the signal line. This could make current loops, which would be the way to go for a high-speed system. However, the power supply layer does not eliminate line clutter, and if you do not pay attention to the power distribution path, all systems will generate noise and cause errors. Therefore, special filters are required, implemented by bypass capacitors. Generally, a capacitor from 1 to 1Op.F is placed on the power input end of the board, and a capacitor from 0.01p.F to U0.1 is placed between the power and ground pins of each active device on the board. The bypass capacitor acts like a filter. The large capacitor (10aF) is placed at the power input to filter out the low frequency (60Hz) noise generated outside the board. The noise generated by the active components on the board will be at 100MHz or higher. To generate harmonics, the bypass capacitors placed between each chip are usually much smaller than the capacitors placed at the power input on the board. According to experience, if the design is mixed with analog and digital, the PCB board is divided into analog and digital parts, the analog device is placed in the analog part, the digital device is placed in the digital part, and the A/D converter is placed across the area. The analog signal and digital signal are routed in their respective areas to ensure that the return current of the digital signal does not flow into the ground of the analog signal. Bypass and decoupling are to prevent the transfer of energy from one circuit to another. Attention should be paid to the three circuit areas of power supply layer, bottom line layer, components and internal power connection. Try to widen the width of the power supply and the ground wire. The ground wire is wider than the power supply line. "-'0.07mm, power cord is 1.2"-'2.5 n'Lrfl. Use a large-area copper layer as a ground wire, and connect the unused places on the printed board to the ground as a ground wire. Or make a multi-layer board, power supply, ground wire each occupy one layer. Configure a 0.01 core ceramic capacitor for each IC chip. If the space of the printed circuit board is too small to fit, a 1-10 core tantalum electrolytic capacitor can be configured for every 4-10 chips. The high-frequency impedance of this device is particularly small, and the impedance is in the range of 500kI-Iz-20MHz. Less than lQ, and the leakage current is very small (below O.5LlA). The decoupling filter capacitor must be installed close to the integrated circuit, and strive to have a short capacitor lead and a small transient current loop area, especially the high-frequency bypass capacitor cannot have a lead. When the system works at 50MHz, there will be transmission line effects and signal integrity problems, and traditional measures can be used to achieve satisfactory results; and when the system clock reaches 120MHz, it is necessary to consider the use of high-speed circuit design knowledge. Otherwise, based on traditional methods The designed PCB board will not work properly. Therefore, high-speed PCB circuit design has become a design technology that electronic system designers must master.

2. PCB board high-speed signal circuit design technology
2.1 High-speed signal routing
The use of multi-layer boards for high-speed signal wiring is not only necessary for wiring, but also an effective means to reduce interference. It is necessary to choose the number of layers reasonably to reduce the size of the printed board, make full use of the intermediate layer to set up shielding, and realize the nearest grounding, which can effectively reduce the parasitic inductance, shorten the signal transmission length, reduce the cross-interference between signals, etc., all of which are very important for high-speed circuits. The reliability of the work is beneficial. According to some data, the noise of the four-layer board is 20dB lower than that of the double-sided board when the same material is used in the Proceedings of the 248 Eighth National Radiation-resistant Electronics and Electromagnetic Pulse Academic Exchange Conference. The less the lead is bent, the better. It adopts a full straight line and needs to be turned. It can be turned by a 45-degree broken line or an arc, which can reduce the external emission and mutual coupling of high-speed signals, and reduce the radiation and reflection of signals. The leads between the pins of high-speed circuit devices should be as short as possible. The longer the lead wire is, the larger the distributed inductance and distributed capacitance will be, which will cause reflection and oscillation in the high-speed circuit system. The less the alternation of lead layers between the pins of high-speed circuit devices, the better, that is, the fewer vias used in the component connection process, the better. According to measurement, a via hole can bring about 0.5pF of distributed capacitance, which leads to a significant increase in the delay of the circuit. In high-speed circuit wiring, attention should be paid to the "cross-interference" introduced by the parallel wiring of signal lines in close proximity. If parallel distribution cannot be avoided, a large area of "ground" can be arranged on the opposite side of the parallel signal lines to reduce interference. On two adjacent layers, the directions of the traces must be perpendicular to each other. Measures to surround the ground wire are implemented for particularly important signal lines or local units. A protective ground wire can be added to the periphery while the signal traces such as clock signals and high-speed analog signals are not easily disturbed, and the signal wires to be protected can be sandwiched in the middle. Various signal traces cannot form loops, and ground wires cannot form current loops. If a loop wiring circuit is generated, it will cause great interference in the system. Using daisy-chain wiring can effectively avoid loops during wiring. One or several high frequency decoupling capacitors should be placed near each IC block. High-frequency choke links should be used when analog ground wires, digital ground wires, etc. are connected to public ground wires. Some high-speed signal lines should be handled specially: differential signals are required to be on the same layer and as close as possible to parallel traces, no signals are allowed to be inserted between differential signal lines, and they are required to be of equal length. High-speed signal routing should try to avoid branches or stumps. High-frequency signal lines are prone to generate large electromagnetic radiation when they run on the surface layer. If the high-frequency signal lines are routed between the power supply and the ground line, the radiation generated will be greatly reduced by the absorption of electromagnetic waves by the power supply and the bottom layer.

2.2 High-speed clock signal routing
Clock circuits play an important role in digital circuits. C64xDSP is a member of the C6000 platform, which has a sufficiently high processing speed. The high-speed clock of C64xDSP can reach 1.1GHz, which is lO times that of early C62xDSP. Therefore, in the future application design of DSP modern electronic system, the requirements for clock wiring will be higher and higher. The priority of the high-speed clock signal line. Generally, when wiring, the main clock signal line of the system needs to be given priority. The signal frequency of the high-speed clock signal line is high, and the traces are required to be as short as possible to ensure the distortion of the signal. High-frequency clocks are particularly sensitive to noise interference. It is necessary to protect and shield the high-frequency clock signal lines to reduce interference. High-frequency clocks (clocks above 20MHz, or clocks with a rising edge of less than 5ns) must be escorted by ground wires, the line width of the clock is at least 10rail, and the line width of the escorted ground wire is at least 20mil. The two ends of the protective ground wire of the high-frequency signal line must be in good contact with the ground through vias, and through holes should be drilled to connect to the ground every 5cm or so; the ground wire escort and the data cable are basically the same length, and manual wiring is recommended; the clock sending side must be connected to the ground. Connect a damping resistor of about 22 to 220Q. The high-speed clock signal trace design should be designed on the same layer as much as possible, and there should be no other interference sources and traces around the high-speed clock signal trace. It is recommended to use star connection or point-to-point connection for high-frequency clock connection. When using T-type connection, it is necessary to ensure the same arm length and minimize the number of over-holes. Copper should be applied under the crystal oscillator or clock chip to prevent interference. Avoid interference caused by signal noise introduced by these lines. In high-speed signal wiring and high-speed clock signal wiring, it is required that the wiring should be less open and less branched, so as to avoid tree stumps, signal reflection and cross-winding. The impact of vias and tree stumps in high-speed PCB boards is not only reflected in the impact on the signal, but also leads to changes in the impedance of the wires. The impact of vias and stumps on impedance is often a problem that designers tend to ignore. To choose a reasonably sized via size. For example, for 4-layer to 10-layer PCB board design, the common choices are 10mil/20mil (drilling/pad) or 16mil/30mil vias. 8mil/18mil vias can be used. The vias for power or ground can be considered larger in size to reduce impedance. The power and ground pins should be placed near vias, and the leads between the vias and the pins should be as short as possible. At the same time, the power and ground leads should be as thick as possible to reduce impedance. High-density system-on-chips are packaged in BGA or COB, and the pin pitch is getting smaller and smaller. Ball pitch has been as low as 0.6mm, and will continue to decrease, making it impossible to use traditional routing tools to lead out signal lines of packaged devices. At present, there are two methods to solve this problem: (1) lead the signal line from the lower layer through the via hole under the ball; (2) use extremely thin Routing and free-angle routing Find a lead channel in the ball grid array. For such high-density devices packaged in BGA or COB, it is only feasible to use wiring methods with minimal width and space. Only in this way can high yield and reliability be ensured and high-speed design requirements can be met.

2.3 Pad design of BGA package
With the development of device packaging technology, the relative size of device packaging is getting smaller and smaller. TMS320C6000 series devices have as many as 352 pins, because the BGA pins are densely spaced and the vias are very close to the pins, which will generate a large inductance. It is also harmful to high-speed signals, so when the BGA is scattered, try to use smaller holes. There is a corresponding relationship between the pad size of the BGA and the pin spacing of the BGA, but it cannot be larger than the diameter of the BGA pin ball, usually about 1/10~1/5 of it. The vias and pads next to the BGA pads need to be plugged and covered with green oil on the component surface. For BGA soldering, no other devices can appear in the surrounding 2era.

3. Conclusion
Digital signal processors are signal processing, and with the popularization of high-frequency devices, the density of printed boards increases, the interference increases, and the improvement of signal quality has mentioned the primary position of design. The PCB board design of high-speed DSPs is a very complicated design process. There are many factors that need to be considered when designing high-speed circuits, and these factors correspond to each other. If high-speed devices are placed close together, although the delay can be reduced, crosstalk and significant thermal effects may occur; when routing high-speed signals, try to route high-speed signals on the inner layer and make less vias. It is also a contradiction. Therefore, in the design, it is necessary to comprehensively consider various favorable factors to make a comprehensive circuit design. Only in this way can a high-quality printed circuit boards with strong anti-interference ability, stable performance and high real-time performance be designed.