PCB Blog - The benefits of laying the ground under the clock crystal on the single PCB board

Precautions for the clock on a single PCB board mainly include the following aspects:

1. Layout

1) The clock crystal and related circuits should be placed in the center of the PCB and have a good ground plane, not near the I/O interface. The clock generation circuit cannot be made in the form of a daughter card or a daughter board, and must be made on a separate clock board or carrier board.

2) Only lay out the devices related to the clock circuit in the clock circuit area of the PCB board, avoid laying other circuits, and do not lay other signal lines near or under the crystal: use the ground plane under the clock generation circuit and crystal, if other signals pass through this plane , which violates the image plane function. If the signal passes through this ground plane, there will be small ground loops and affect the continuity of the ground plane. These pcb ground loop will cause problems at high frequencies.

3) For clock crystals and clock circuits, shielding measures can be used for shielding;

4) If the clock casing is made of metal, copper must be placed under the crystal when the PCB is designed, and this part must have a good electrical connection with the complete ground plane (through porous grounding).

2. The benefits of laying the floor under the clock crystal:

The circuit inside the crystal oscillator will generate radio frequency current. If the crystal is encapsulated in a metal casing, the DC power pin is the reference of the DC voltage reference and the RF current loop reference inside the crystal, and the transient current generated by the radio frequency radiation of the casing is released through the ground plane. In short, the metal casing is a single-ended antenna, and the near image layer, the ground plane layer and sometimes two or more layers are sufficient for the radiation coupling of the RF current to the pcb ground loop. The floor under the crystal is also good for heat dissipation. The clock circuit and the bottom of the crystal will provide an image plane, which can reduce the common mode current generated by the related crystal and clock circuit, thereby reducing the RF radiation. The ground plane also absorbs the differential mode RF current. This plane must be connected through multiple points. To a complete ground plane, and requires multiple vias to provide low impedance, in order to enhance the effect of this ground plane, the clock generation circuit should be close to this ground plane. SMT-packaged crystals will radiate more RF energy than metal-cased crystals: Because surface mount crystals are mostly plastic packages, RF currents inside the crystal will radiate into space and couple to other devices.

3. Shared clock traces

It is better to use a radial topology connection for fast rising edge signals and clock signals than to use a single common drive source network in series. Each trace should be wired according to its characteristic impedance.

4. Clock transmission line requirements and PCB layering

Clock routing principle: Arrange a complete image plane layer next to the clock routing layer, reduce the length of the routing and perform impedance control.

5. Incorrect cross-layer traces and impedance mismatches can lead to:

1) The use of vias and jumps for traces leads to the incompleteness of the image pcb ground loop;

2) The surge voltage on the image plane due to the change of the voltage on the signal pin of the device with the change of the signal;

3) If the wiring does not consider the 3W principle, different clock signals will cause crosstalk;

6. Route the clock signal:

1) The clock line must be on the inner layer of the multi-layer PCB board. And be sure to take the strip line; if you want to go on the outer layer, you can only take the microstrip line.

2) Walking on the inner layer can guarantee a complete image plane, it can provide a low impedance RF transmission path and generate magnetic flux to cancel the magnetic flux of their source transmission line, the closer the distance between the source and return path, the better the demagnetization . Due to the enhanced degaussing capability, each complete planar image layer of a high-density PCB can provide 6-8dB of rejection.

3) Advantages of clock cloth multi-layer board: There are one or more layers that can be dedicated to the complete power supply and ground plane, and can be designed as a good decoupling system, reducing the area of the ground loop, reducing differential mode radiation, reducing The EMI is reduced, the impedance level of the signal and power return paths is reduced, the consistency of the trace impedance throughout the whole process can be maintained, and the crosstalk between adjacent traces is reduced on the PCB board.