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PCB Blog - EMI Control Technology in Digital Circuit PCB Design

PCB Blog

PCB Blog - EMI Control Technology in Digital Circuit PCB Design

EMI Control Technology in Digital Circuit PCB Design

2022-01-21
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Author:pcb

1. EMI generation and suppression principle
EMI in printed circuit boards design is caused by sources of electromagnetic interference that transfer energy to sensitive systems through coupling paths. It includes three basic forms: conduction through wire or common ground, radiation through space, or coupling through near-field. The harm of EMI is manifested as reducing the quality of the transmission signal, causing interference or even damage to the circuit or equipment, so that the equipment cannot meet the technical index requirements specified in the electromagnetic compatibility standard.
In order to suppress EMI, the EMI design of digital circuits should be carried out according to the following principles:
1.1 According to the relevant EMC/EMI technical specifications, the indicators are decomposed into single-board circuits for hierarchical control.
1.2 Control from the three elements of EMI, namely, the interference source, the energy coupling path and the sensitive system, so that the circuit has a flat frequency response and ensures the normal and stable operation of the circuit.
1.3 Start with the front-end design of the equipment, pay attention to EMC/EMI design, and reduce the design cost.

Printed Circuit Boards

2. EMI control technology of digital circuit PCB board
When dealing with various forms of EMI, specific problems must be analyzed. In the PCB board design of digital circuits, EMI control can be carried out from the following aspects.
2.1 Device Selection
In EMI design, the first thing to consider is the speed of the selected device. Any circuit that replaces a device with a rise time of 5ns with a device with a rise time of 2.5ns will increase EMI by a factor of about 4. The radiated intensity of EMI is proportional to the square of the frequency, also known as the EMI emission bandwidth, which is a function of the signal rise time rather than the signal frequency: fknee =0.35/Tr (where Tr is the signal rise time of the device). The frequency range of this type of radiated EMI is 30MHz to several GHz, and in this frequency band, the wavelengths are so short that even very short wiring on the circuit board can become a transmitting antenna. When EMI is high, the circuit is prone to lose normal function. Therefore, in terms of device selection, on the premise of ensuring circuit performance requirements, low-speed chips should be used as much as possible, and appropriate driving/receiving circuits should be used. In addition, since the lead pins of the device have parasitic inductance and parasitic capacitance, in high-speed design, the influence of the device packaging form on the signal can not be ignored, because it is also an important factor to generate EMI radiation. In general, the parasitic parameters of SMD devices are smaller than those of plug-in devices, and the parasitic parameters of BGA packages are smaller than those of QFP packages.

2.2 Connector selection and signal terminal definition
Connector is the key link of high-speed signal transmission, and it is also the weak link that is prone to EMI. In the terminal design of the connector, more ground pins can be arranged to reduce the distance between the signal and the ground, reduce the effective signal loop area that generates radiation in the connector, and provide a low-impedance return path. If necessary, consider isolating some key signals with ground pins.

2.3 Laminate Design
If the cost permits, increasing the number of ground layers and placing the signal layer next to the ground plane layer can reduce EMI radiation. For high-speed PCB boards, the power and ground planes are coupled in close proximity to reduce power supply impedance, thereby reducing EMI.

2.4 Layout
According to the signal current flow, a reasonable layout can reduce the interference between signals. Proper layout is the key to controlling EMI. The basic principles of layout are:
(1) The analog signal is easily interfered by the digital signal, and the analog circuit should be separated from the digital circuit;
(2) The clock line is the main source of interference and radiation, so keep it away from sensitive circuits and keep the clock line short;
(3) Circuits with high current and high power consumption should be avoided as far as possible in the central area of the board, and the influence of heat dissipation and radiation should be considered at the same time;
(4) The connectors should be arranged on one side of the board as far as possible and away from high-frequency circuits;
(5) The input/output circuit is close to the corresponding connector, and the decoupling capacitor is close to the corresponding power supply pin;
(6) Fully consider the feasibility of layout for power splitting, and multi-power devices should be placed across the boundary of the power splitting area to effectively reduce the impact of plane splitting on EMI;
(7) The reflow plane (path) is not divided.

2.5 Wiring
(1) Impedance control: High-speed signal lines will exhibit the characteristics of transmission lines, and impedance control is required to avoid signal reflection, overshoot and ringing, and reduce EMI radiation.
(2) Classify the signals, according to the EMI radiation intensity and sensitivity of different signals (analog signal, clock signal, I/O signal, bus, power supply, etc.), separate the interference source from the sensitive system as much as possible to reduce coupling.
(3) Strictly control the trace length, number of vias, cross partitions, terminations, wiring layers, return paths, etc. of clock signals (especially high-speed clock signals).
(4) The signal loop, that is, the loop formed by the signal flowing out to the signal flowing in, is the key to EMI control in PCB design and must be controlled during wiring. To understand the flow direction of each key signal, route the key signal close to the return path to ensure its loop area. For low-frequency signals, make the current flow through the path of the resistor; for high-frequency signals, make the high-frequency current flow through the path of the inductor, not the path of the resistor. For differential mode radiation, the EMI radiation intensity (E) is proportional to the current, the area of the current loop, and the square of the frequency. (where I is the current, A is the loop area, f is the frequency, r is the distance to the center of the loop, and k is a constant.) So when the inductor return path is just below the signal conductor, the current loop area can be reduced, Thereby reducing EMI radiated energy. Critical signals must not cross the segmented area. High-speed differential signal traces should be as tightly coupled as possible. Make sure that striplines, microstrip lines, and their reference planes meet the requirements. The leads of the decoupling capacitors should be short and wide. All signal traces should be kept as far away from the edge of the board as possible. For multi-point connection networks, choose an appropriate topology to reduce signal reflections and reduce EMI emissions.

2.6 Split Processing of Power Plane
(1) Division of the power supply layer
When there are one or more sub-power supplies on a main power supply plane, ensure the continuity of each power supply area and sufficient copper foil width. The dividing line does not need to be too wide, generally a line width of 20-50 mil is sufficient to reduce the gap radiation.
(2) Division of the ground layer
The ground plane layer should remain intact to avoid fragmentation. If it must be divided, distinguish the digital ground, the analog ground and the noise ground, and connect it to the external ground through a common ground point at the outlet. In order to reduce the fringe radiation of the power supply, the power/ground plane should follow the 20H design principle, that is, the size of the ground plane is 20H larger than the size of the power plane, so that the fringe field radiation intensity can be reduced by 70%.

3. Other control methods for EMI
3.1 Power System Design
(1) Design a low impedance power system to ensure that the impedance of the power distribution system in the frequency range below fknee is lower than the target impedance.
(2) Use a filter to control conducted interference.
(3) Power supply decoupling. In EMI design, providing reasonable decoupling capacitors can make the chip work reliably, and reduce high-frequency noise in the power supply, reducing EMI. Due to the influence of wire inductance and other parasitic parameters, the power supply and its supply wires are slow to respond, which can make the instantaneous current required by the driver in the high-speed circuit insufficient. Reasonable design of bypass or decoupling capacitors and distributed capacitance of the power supply layer can quickly supply current to the device by utilizing the energy storage effect of the capacitor before the power supply responds. Proper capacitive decoupling provides a low impedance power path, which is key to reducing common mode EMI.

3.2 Grounding
Grounding design is the key to reducing the EMI of the whole board.
(1) Make sure to use single-point grounding, multi-point grounding or mixed grounding.
(2) Separate digital ground, analog ground and noise ground, and determine a suitable common ground point.
(3) If there is no ground wire layer in the double-sided design, it is very important to design the ground wire grid reasonably, and the width of the ground wire, the width of the power wire, and the width of the signal wire should be guaranteed. It is also possible to use a large-area paving method, but it should be noted that the continuity of the large-area ground on the same layer is better.
(4) For the multi-layer board design, ensure that there is a ground plane layer to reduce the common ground impedance.

3.3 Damping resistor in series
Under the premise that the circuit timing requirements allow, the basic technology of suppressing the interference source is to insert a small resistance value in series at the key signal output end, usually a 22-33Ω resistance. The series connection of small resistors at the output terminals can slow down the rise/fall time and smooth the overshoot and undershoot signals, thereby reducing the high frequency harmonic amplitude of the output waveform and effectively suppressing EMI.

3.4 Shield
(1) Key devices can use EMI shielding material or shielding mesh.
(2) The shielding of key signals can be designed as strip lines or isolated by ground wires on both sides of key signals.

3.5 Spread Spectrum
Spread spectrum (spread spectrum) method is a new effective method to reduce EMI. Spread spectrum is to modulate the signal to expand the signal energy to a relatively wide frequency range. In effect, this method is a controlled modulation of the clock signal, which does not significantly increase the jitter of the clock signal. Practical applications have proven that spread spectrum techniques are effective, reducing emissions by 7 to 20 dB.

3.6 EMI Analysis and Testing
(1) Simulation analysis. After the PCB board wiring is completed, the EMI simulation software and system can be used for simulation analysis to simulate the EMC/EMI environment to evaluate whether the product meets the requirements of the relevant electromagnetic compatibility standards.
(2) Scanning test, use an electromagnetic radiation scanner to scan the machine disk after the assembly is connected and powered on.

4. Summary
With the continuous development and application of new high-speed chips, the signal frequencies are getting higher and higher, and the PCBs that carry them may become smaller and smaller. PCB board design will face more severe EMI challenges. Only by continuous exploration and innovation can the EMC/EMI design of printed circuit boards be successful.