PCB News - Eight Misunderstandings in Circuit Design

Phenomenon 1: The PCB design requirements of this board are not high, so use a thinner thread and automatically arrange it.
Comment: Automatic wiring will inevitably take up a larger PCB board area, and at the same time it will produce many times more vias than manual wiring. In a large batch of products, the factors that PCB manufacturers consider for reducing prices are line width and overpass, in addition to business factors. The number of holes, which respectively affect the yield of PCB and the number of consumption of drill bits, saves the cost of the supplier, and finds a reason for the price reduction.

Phenomenon 2: These bus signals are all pulled by resistors, so I feel relieved.

Comment: There are many reasons why signals need to be pulled up and down, but not all of them need to be pulled. The pull-up and pull-down resistor pulls a simple input signal, and the current is less than tens of microamperes, but when a driven signal is pulled, the current will reach the milliamp level. The current system often has 32 bits of address data each, and there may be If the 244/245 isolated bus and other signals are pulled up, a few watts of power consumption will be consumed on these resistors.

Phenomenon 3: How to deal with these unused I/O ports of CPU and FPGA? Leave it empty first, and talk about it later.

Comment: If the unused I/O port is left floating, it may become an input signal that repeatedly oscillates due to a little interference from the outside world, and the power consumption of MOS devices basically depends on the number of flips of the gate circuit. If it is pulled up, each pin will also have microampere current, so the best way is to set it as output (of course, no other signals with driving can be connected to the outside)

Phenomenon 4: There are so many doors left in this FPGA, so you can play as much as you like.

Comment: The power consumption of FGPA is directly proportional to the number of flip-flops used and the number of flips. Therefore, the power consumption of the same type of FPGA at different circuits and different times may differ by 100 times. Minimizing the number of flip-flops for high-speed flipping is the fundamental way to reduce FPGA power consumption.

Phenomenon 5: The power consumption of these small chips is very low, so there is no need to consider.

Comment: It is difficult to determine the power consumption of the internal chip that is not too complicated. It is mainly determined by the current on the pin. An ABT16244 consumes less than 1 mA without load, but its indicator is each pin. It can drive a load of 60 mA (such as matching a resistance of tens of ohms), that is, the maximum power consumption of a full load can reach 60*16=960mA. Of course, only the power supply current is so large, and the heat falls on the load.

Phenomenon 6: The memory has so many control signals. My board only needs to use the OE and WE signals. The chip select should be grounded, so that the data comes out much faster during the read operation.

Comment: The power consumption of most memories when the chip selection is valid (regardless of OE and WE) will be more than 100 times larger than when the chip selection is invalid. Therefore, CS should be used to control the chip as much as possible, and as far as other requirements are met. It is possible to shorten the width of the chip select pulse.

Phenomenon 7: Why are these signals overshooting? As long as the match is good, it can be eliminated.

Comment: Except for a few specific signals (such as 100BASE-T, CML), there are overshoots. As long as they are not very large, they do not necessarily need to be matched. Even if they are matched, they do not necessarily match the best. For example, the output impedance of TTL is less than 50 ohms, and some even 20 ohms. If such a large matching resistance is used, the current will be very large, the power consumption will be unacceptable, and the signal amplitude will be too small to be used. Besides, the output impedance of a general signal when outputting a high level and outputting a low level is not the same, and there is no way to achieve a complete match. Therefore, the matching of TTL, LVDS, 422 and other signals can be acceptable as long as the overshoot is achieved.

Phenomenon 8: Reducing power consumption is a matter of hardware personnel, and has nothing to do with software.

Comment: The hardware is just a stage, but the software is the performer. The access of almost every chip on the bus and the flip of every signal are almost controlled by the software. If the software can reduce the number of accesses to the external memory (using more register variables, More use of internal CACHE, etc.), timely response to interrupts (interrupts are often low-level active with pull-up resistors) and other specific measures for specific boards will make a great contribution to reducing power consumption.