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PCB News - How to reduce parasitic coupling in PCB design

PCB News

PCB News - How to reduce parasitic coupling in PCB design

How to reduce parasitic coupling in PCB design

2021-11-01
View:664
Author:Kavie

In order to prevent parasitic coupling, when laying out various signals and input and output wires, the following should be done:


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1. Deal with the layout of feedback wires and components. When handling the feedback wires and components between the front and rear stages, the feedback components should be placed at the junction of the front and rear stages so that the connecting wires do not exceed the scope of this stage as much as possible. After adopting such a layout, the final-stage wires are far away from the previous-stage components, which eliminates the unnecessary parasitic coupling of the un-staged large signals with the previous-stage components through the feedback wires and components.

2. When designing the layout of the circuit board, the circuits should be arranged according to the order of signal transmission. Do not circumvent or leapfrog the arrangement, so that the wiring can avoid parasitic interference caused by signal lines at all levels crossing each other.

3. The parasitic parameter is proportional to the length of the wire, so the signal wiring between all levels should be as short as possible.

4. Try to avoid parallel signal lines. When handling jumper wires and double-sided printed boards in the board, the wires on both sides should be arranged perpendicular to each other or crossed.

5. For the wires that must be laid in parallel in the board, the wire spacing should be increased as much as possible, or separated by ground wires and power wires, and shielding can also be considered. It should be pointed out that two parallel wires that are susceptible to interference mean that the working frequencies of the signals on the two wires are the same or similar, and there is no filter circuit. For example, the low-frequency power amplifier (f≤20kHz) of the radio can be routed in parallel with the receiving part. This is because the operating frequency between the two is very different, and it is not easy to cause interference. The lead of the volume potentiometer is easy to interfere, so it cannot be laid in parallel.

6. A large loop wire should be avoided in the board. It can be considered that the loop wire in the board is a single-turn coil, which is easy to produce and accept interference. Avoid using a large loop layout when typesetting.

The above is an introduction to how to reduce parasitic coupling in PCB design. Ipcb is also provided to PCB manufacturers and PCB manufacturing technology.