In PCB design, providing a stable voltage to the signal and proper voltage distribution are two basic goals in the design of a power supply system. With the emergence of signal integrity problems, reflections, crosstalk, etc. will affect the stability of the power system. Coupled with the continuous reduction of chip operating voltage, the fluctuation of the power supply will affect the normal operation of the system. Power integrity analysis is to ensure a stable and reliable power supply in the PCB.
Overview of Power Integrity Analysis
Power integrity refers to the quality of the power waveform in the system. As the IC output switching speed increases, the edge rate of the signal, that is, the signal rise and fall time, is rapidly reduced, and the power line suffers a considerable voltage drop due to its parasitic inductance. For signal edge rates less than 1ns, the voltage between the power layer and the ground layer on the PCB will be different everywhere on the circuit board, which will affect the stability of the chip power supply, and even cause the logic of the chip
The factors that cause power system instability are synchronous switching noise, non-ideal power supply impedance influence, resonance and edge effects. In general, synchronous switching noise is the main source of power supply noise. Due to the parasitic inductance of the ground lead and the plane, a certain voltage fluctuation will be caused under the action of the switching current.
That is to say, the reference ground of the device is no longer at zero level. Therefore, the ground level to be sent by the drive end will change. Corresponding interference waveform appears. The phase of the interference waveform is the same as the ground noise. For the switching signal waveform, the influence of the ground noise will cause the falling edge of the signal to slow down; at the receiving end, the signal waveform will also be interfered by the ground noise. However, the phase of the interference waveform is opposite to that of the ground noise. In addition, in some storage components, it is possible that power noise and ground noise may cause unexpected data inversion.
In high-frequency circuits, there are a large number of parasitic parameters in the power plane. These parasitic parameters can be seen as an LC resonant network or resonant cavity composed of many inductances and capacitors. At a certain frequency, these capacitors and inductances will resonate, thereby affecting the impedance of the power layer. In addition to the resonance effect, the edge effect of the power plane and the ground plane is also a problem that needs to be paid attention to in the power supply design. The edge effect here refers to the edge reflection and radiation phenomenon. The size of the copper-clad surface on the edge of the circuit board is limited, so electromagnetic interference problems are prone to occur. Decoupling capacitors are usually added in the project to reduce the edge radiation effect and achieve the purpose of suppressing the noise of the power plane.
Synchronous switching noise
Synchronous switching noise (SSN) is mainly produced by the synchronous switching output accompanying the device. The faster the switching speed, the more significant the instantaneous current change, and the greater the inductance on the current loop, the more severe the synchronous switching noise generated. It can be seen that the magnitude of the synchronous switching noise depends on the I/O characteristics of the integrated circuit, the impedance of the power plane and ground plane of the PCB board, and the layout and wiring of high-speed devices on the PCB.
According to different return paths, synchronous switching noise can be divided into off-chip switching noise and on-chip switching noise. Off-chip switching noise refers to the noise generated when the current returned by the signal switch passes through the signal line and the power/ground plane; if the switching state changes, the current return path passes through the power and ground instead of the signal line, the noise at this time is On-chip switching noise. Reducing the switching noise in the chip is mainly achieved by reducing the inductance of the path that the switching signal flows through or slowing the rate of change of the switching signal to reduce the induced voltage. Reducing off-chip switching noise can be achieved by reducing the switching rate of the internal driver of the chip and the number of simultaneous switches, using the slowest edge rate chip that can meet the timing requirements; or by reducing the package loop inductance, increasing the coupling inductance of the signal and power supply to the ground ; A bypass capacitor can also be used inside the package to allow the power supply and ground to share the current loop and reduce the equivalent inductance of the return path.
PCB power distribution design
To a large extent, power supply noise stems from non-ideal power distribution systems. The power distribution system is to provide enough power to all the devices in the system. These devices not only need sufficient power loss, but also have certain requirements for the stability of the power supply. Because there is always impedance in the actual power plane, when there is a momentary current passing through, a voltage drop will occur, which will lead to power fluctuations. Most devices require power fluctuations within ±5% of the normal voltage. In order to ensure that each device can work normally, the impedance of the power plane should be reduced as much as possible. In the case of a relatively high operating frequency, it is necessary to calculate the DC impedance of the resistance and the AC impedance caused by the inductance. When controlling the impedance of the power supply, you can reduce the internal resistance of the power supply by using materials with low resistivity and short and thick power lines. The power supply should be as close to the ground as possible, and decoupling capacitors can be used to reduce the resistance of the power supply. And inductance, thereby reducing the power supply impedance.