Electronic Design - How to use parametric constraints for PCB design?

In recent years, the requirements for PCB layout and wiring have become more and more complex. The number of transistors in integrated circuits is still rising at the speed predicted by Moore’s Law, which makes the device faster and the rise time of each pulse edge is shortened, and the number of pins is also increasing. More and more-often 500 to 2,000 pins. All of this will bring density, clock, and crosstalk issues when designing the PCB.

Nowadays, the factors considered in PCB design are becoming more and more complex, such as clock, crosstalk, impedance, detection, manufacturing process, etc., which often makes PCB designers repeat a lot of work such as layout, verification and maintenance. The parameter constraint editor can compile these parameters into formulas, helping PCB designers to better deal with these parameters that sometimes even oppose each other during the PCB design and production process.

A few years ago, there were only a few "critical" nodes (net) on most PCBs, which usually meant that they were subject to some constraints in terms of impedance, length, and gap. PCB designers generally first manually route these traces, And then use software to make large-scale automatic wiring of the entire circuit. Today's PCBs often have 5,000 or more nodes, and more than 50% of them are critical nodes. Due to the time-to-market pressure, manual wiring is no longer possible at this time. In addition, not only the number of critical nodes has increased, but the constraints of each node have also increased.

These constraints are mainly caused by parameter correlation and the increasing complexity of PCB design requirements. For example, the distance between two traces may depend on a function related to node voltage and circuit board material, and the rise time of digital IC is reduced. Both high clock speed and low clock speed PCB design will have an impact. Due to faster pulse generation, the setup and hold time will be shorter. In addition, the interconnection delay as an important part of the total delay of high-speed circuit PCB design is also important for low-speed PCB design. It is also very important and so on.

If the circuit board can be designed larger, some of the above problems will be easier to solve, but the current development trend is just the opposite. Due to the requirements for interconnection delay and high-density packaging, circuit boards are becoming smaller, resulting in high-density circuit PCB design. At the same time, miniaturized PCB design rules must be followed. The reduced rise time and these miniaturized PCB design rules make crosstalk noise more and more prominent. Ball grid arrays and other high-density packages will also aggravate crosstalk, switching noise, and ground bounce.

the limitations of fixed constraints

The traditional way to deal with these problems is to transform electrical and technological requirements into fixed constraint parameters based on experience, default values, number tables or calculation methods. For example, an engineer may first determine a rated impedance when designing a circuit on a PCB, and then "estimate" a rated line width that can achieve the required impedance according to the final process requirements, or use a calculation table or arithmetic program to test the interference, and then find the length Restrictions.

This method usually requires PCB design to develop a set of experience data as the basic guideline for PCB designers, so that these data can be used in PCB design with automatic placement and routing tools. The problem with this method is that empirical data is only a general principle. In most cases, they are correct, but sometimes they do not work or lead to wrong results.

Solution: parameterized constraints

At present, PCB design software suppliers try to solve this problem by adding parameters to the constraints. The most advanced part of this method is that it can specify the mechanical indicators that fully reflect the various internal electrical characteristics. As long as they are added to the PCB design, the PCB design software can use this information to control the automatic placement and routing tools.

Constraints can be input in the form of mathematical expressions, including constants, various operators, vectors, and other PCB design constraints, providing PCB designers with a parametric rule-driven system. Constraints can even be entered in the form of look-up tables and stored in PCB or schematic PCB design files. PCB wiring, copper foil area location and layout tools must comply with the constraint rules generated by these conditions. DRC verifies whether the entire PCB design meets these constraints, including line width, spacing and space requirements (such as area and height restrictions), etc. .

A very simple example is the rise time constraint, which is generally set to a constant 1.5ns. According to this condition, the maximum trace length constraint can be obtained, that is, 5,800mil/ns multiplied by the rise time 1.5ns. A more complicated example is the component spacing, which is determined by multiplying the tangent value of the detection angle by the device height. This formula can calculate the minimum component spacing value.

hierarchical management

One of the main benefits of parameterized constraints is that it can be processed hierarchically. For example, the global line width rule can be used as a PCB design constraint for the entire PCB design. Of course, there are certain areas or nodes that cannot copy this principle. In this case, the higher-level constraints can be bypassed and the lower-level constraints in hierarchical PCB design can be used. Take ACCEL Technologies' constraint editor Parametric Constraint Solver as an example, there are 7 levels of constraints:

1. PCB design constraints, used for all objects without other constraints.

2. Level constraints, used for objects on a certain level.

3. Node type constraints, used for all nodes contained in a certain type.

4. Node constraint, used for a certain node.

5. Inter-class constraints, which means constraints between two types of nodes.

6. Space constraints, used for all devices in a certain space.

7. Device constraints, used for a certain device.

The software follows the various PCB design constraints in the order from individual devices to the entire PCB design rules, and graphically shows the order of application of these rules in PCB design.

PCB design reuse and documentation

Parametric constraints can not only significantly improve the initial PCB design process, but are also more useful for engineering changes and PCB design reuse. Constraints can be used as part of the PCB design, system, and documentation. If not, they will only be stored in the engineer or PCB design. In people’s minds, they may slowly forget when they move on to other projects. Constraint documents record the electrical performance rules that should be followed in the PCB design process, so that others have an opportunity to understand the intention of the PCB designer, so that these rules can be easily applied to new manufacturing processes or changed according to electrical performance requirements. Future reusers can also know the accurate PCB design rules and make changes by inputting new process requirements, without having to guess about issues such as how the line width is obtained.