PCB Technical - The key technology and progress of high-speed and high-density PCB design

High-speed and high-density has gradually become one of the significant development trends of many modern electronic products, and high-speed and high-density PCB design technology has become an important research field.

Compared with traditional PCB design, high-speed and high-density PCB design has several key technical issues, and new design techniques need to be developed. There are many theoretical and technical issues that need to be studied in depth. At the same time, the requirements for high-speed and high-density PCB are getting higher and higher, which makes high-speed and high-density PCB design continue to face new problems; the continuous emergence of a large number of related research results has promoted the continuous development of high-speed and high-density PCB design technology. This article introduces the key technical issues of high-speed and high-density PCB design (signal integrity, power integrity, EMC/EM I and thermal analysis) and new developments in related EDA technology, and discusses several important trends in high-speed and high-density PCB design.

Key technical issues

The key technical issues of high-speed and high-density PCB design mainly include signal integrity (SI), power integrity (PI), EMC/EM I and thermal analysis.

Signal integrity

Signal integrity mainly refers to the quality of the signal transmitted on the signal line. 1 When the circuit signal can reach the pins of the receiving chip with the required timing, duration and voltage amplitude, the circuit has good signal integrity. When the signal can't respond normally or the signal quality can't make the system work stably for a long time, the signal integrity problem appears. Signal integrity problems are mainly manifested as: delay, reflection, overshoot, ringing, crosstalk, timing, synchronous switching noise, EM I, etc.

Signal integrity problems will directly lead to signal distortion, timing errors, and incorrect data, address and control signals, resulting in system errors or even paralysis. Generally, for digital chips, the level higher than V IH is logic 1, and the level lower than V IL is logic 0, and the level between VIL and VIH is an indeterminate state. For digital signals with ringing, when the oscillation level enters the uncertainty zone of VIL ~ VIH, logic errors may be caused. The transmission of digital signals must have correct timing. General digital chips require that the data must be stable before tsetup of the clock trigger edge to ensure that the logic sequence is correct. If the signal transmission delay time is too long, the correct logic may not be received at the rising or falling edge of the clock, causing timing errors.

The reasons for signal integrity problems are more complicated. The parameters of components, PCB parameters, the layout of components on the PCB, and the wiring of high-speed signals are all important factors that affect signal integrity. Signal integrity is a systematic problem, and the research and resolution of signal integrity problems must use a systematic point of view.

Relatively speaking, people have gone through decades of research on signal integrity issues, and have obtained many important theoretical and technical results, and accumulated rich experience. Many signal integrity technologies are relatively mature and have been widely used.

Power integrity

Power integrity mainly refers to the high-speed system, the power distribution system (power distribution system, PDS) at different frequencies, the impedance characteristics are different, so that the voltage between the power layer and the ground layer on the PCB is not the same everywhere on the circuit board, resulting in The power supply is discontinuous, resulting in power supply noise, which makes the chip unable to work normally. At the same time, due to high-frequency radiation, power integrity issues will also bring EMC/EM I issues. In high-speed, low-voltage circuits, power supply noise is particularly serious.

The proposal of power integrity originated from the huge error brought by signal integrity analysis based on wiring and device models without considering the influence of power.

Relatively speaking, the research on power integrity started late, and the theoretical research and technical means are not mature enough. It is one of the biggest challenges for high-speed and high-density PCB design. At present, some common measures are mainly adopted to minimize the adverse effects caused by power integrity problems to a certain extent. The main measures taken are one to optimize the PCB stack, layout and wiring design; the other is to increase decoupling capacitors appropriately. When the system frequency is less than 300-400 MHz, it is helpful to reduce the influence of power integrity problems by setting a suitable capacitor in an appropriate position. However, when the system frequency is higher, the decoupling capacitor has little effect. In this case, only by optimizing the PCB design to reduce the impact of power integrity issues.

EMC

EMC (electro-magnetic compatibility) is usually defined as: "The ability of a device or system to work normally in its electromagnetic environment and does not constitute an unbearable electromagnetic disturbance to anything in the environment." It is also defined as: "Research is limited. Under the conditions of limited space, limited time, and limited spectrum resources, various electrical equipment (sub-systems, systems, and biological entities in a broad sense) can coexist without causing degradation."

EMC mainly studies two aspects of EM I (electro-magnetic interference) and EMS (electro-magnetic suscep tibility). The generation of EM I is caused by the electromagnetic interference source transmitting energy to the sensitive system through the coupling path. It includes three basic forms: conduction by wire and common ground, radiation through space, or coupling through near-field.

The EMC of electronic products is very important. At present, many countries and regions have strict and complete EMC standards. More and more electronic products must pass relevant EMC testing and certification before they can enter the market. Moreover, with the deteriorating electromagnetic environment, the EMC requirements for electronic products will become higher and higher.

Relatively speaking, the EMC problem is the most complicated. When the rise (fall) time (rise time or fall time) is reduced from 5 ns to 2.5 ns, EM I will increase by about 4 times. The spectral width of EM I is inversely proportional to the rise time. The radiation intensity of EM I is proportional to the square of the frequency. The frequency range of this type of EM I radiation is about tens of MHz to several GHz. The wavelengths corresponding to these high frequencies are very short, and the short connecting lines on the PCB or even the interconnecting lines in the chip may become efficient transmitting or receiving antennas, which may cause serious EMC problems. Henry W Ott, President of Henry Ott Consulting, emphasized in his keynote speech at the PCB Design Conference-East: "In the era of high-speed design, PCB designers will face problems if they do not learn more about EMC issues. Many unexpected problems." "Because the design speed is faster and wireless design has become more and more common, EMC will become an even greater challenge."

Due to the complexity of EMC and the increasing requirements of modern electronic products for EMC, EMC technology will be an important field that requires long-term research. At present, preventing and solving EMC problems mainly follow some common PCB design constraint rules. However, the specific use of those rules and the effect must be analyzed in detail, which depends to a large extent on the designer's theoretical level and practical experience.