60. How does Mentor's PCB design software support BGA, PGA, COB and other packages?
Mentor's autoactive RE is developed from the acquired veribest and is the industry's first gridless, arbitrary-angle router.
As we all know, for ball grid arrays, COB devices, gridless, arbitrary-angle routers are the key to solving the distribution rate.
In the latest autoactive RE, new functions such as push vias, copper foil, and REROUTE have been added to make its application more convenient. In addition, he supports high-speed wiring, including delay-required signal wiring and differential pair wiring.
61. How does Mentor's PCB design software handle differential line teams?
After the Mentor software defines the properties of the differential pair, the two differential pairs can be routed together, strictly ensuring the line width, spacing and length difference of the differential pair, and can be separated automatically when encountering obstacles. You can choose the via method when changing layers.
62. On a 12-layer PCB board, there are three power layers 2.2v, 3.3v, and 5v. How to deal with the ground wire when the three power supplies are made on one layer?
Generally speaking, the three power supplies are built on the third layer, which is better for signal quality. Because it is unlikely that the signal will be split across the plane layer. Cross-segmentation is a key factor affecting signal quality, and simulation software generally ignores it.
For the power layer and the ground layer, it is equivalent to the high-frequency signal. In practice, in addition to considering signal quality, power plane coupling (using adjacent ground planes to reduce the AC impedance of the power plane) and stacking symmetry are all factors that need to be considered.
63. How to check whether the PCB meets the design process requirements before leaving the factory?
Many PCB manufacturers have to go through a power-on network continuity test before the PCB processing is completed to ensure that all connections are correct. At the same time, more and more manufacturers are also using x-ray testing to check some failures during etching or lamination.
For finished boards after patch processing, ICT testing is generally used, which requires ICT test points to be added during PCB design. If there is a problem, you can also use a special X-ray inspection equipment to rule out whether the processing causes the fault.
64. Is "the protection of the organization" the protection of the case?
Yes. The cabinet should be as tight as possible, use less or no conductive materials, and be grounded as much as possible.
65. Is it necessary to consider the esd problem of the chip itself when selecting a chip?
Whether it is a double-layer board or a multi-layer board, the area of the ground should be increased as much as possible. When choosing a chip, consider the ESD characteristics of the chip itself. These are generally mentioned in the chip description, and the performance of the same chip from different manufacturers will be different. Pay more attention to the design and consider it comprehensively, and the performance of the circuit board will be guaranteed to a certain extent. But the problem of ESD may still occur, so the protection of the organization is also very important to the protection of ESD.
66. When making PCB boards, in order to reduce interference, should the ground wire form a closed-sum form?
When making a PCB board, generally speaking, the loop area should be reduced to reduce interference. When laying the ground wire, it should not be laid in a closed form, but it is better to arrange it in a tree shape. The area of the earth.
67. If the emulator uses one power supply and the PCB board uses one power supply, should the grounds of the two power supplies be connected together?
If you can use a separate power supply, of course, it is better, because it is not easy to cause interference between power supplies, but most devices have specific requirements. Since the emulator and the PCB board use two power supplies, in my opinion, they should not be grounded together.
68. A circuit consists of several PCB boards. Should they share the same ground?
A circuit is composed of several PCBs, most of which require a common ground, because it is not practical to use several power supplies in a circuit after all. But if you have specific conditions, you can use a different power supply, of course, the interference will be less.
69. Design a handheld product with LCD and metal shell. When testing ESD, it cannot pass the test of ICE-1000-4-2, CONTACT can only pass 1100V, and AIR can pass 6000V. In the ESD coupling test, it can only pass 3000V horizontally and 4000V vertically. The CPU frequency is 33MHZ. Is there any way to pass the ESD test?
Hand-held products are also made of metal, so the problem of ESD must be obvious, and LCD may also have more undesirable phenomena. If there is no way to change the existing metal material, it is recommended to add anti-electric material inside the organization to strengthen the PCB ground, and at the same time find a way to ground the LCD. Of course, how to operate depends on the specific situation.
70. When designing a system with DSP and PLD, which aspects should be considered for ESD?
In terms of a general system, the parts that are directly in contact with the human body should be mainly considered, and proper protection should be carried out on the circuit and the mechanism. As for how much impact ESD will have on the system, it depends on different situations. In a dry environment, the ESD phenomenon will be more serious, and the more sensitive and delicate systems will have a relatively obvious impact of ESD. Although sometimes the ESD impact of a large system is not obvious, it is necessary to pay more attention when designing, and try to prevent problems before they occur.
71. How to avoid crosstalk in PCB design?
A changed signal (such as a step signal) propagates along the transmission line from A to B. A coupled signal will be generated on the transmission line CD. Once the changed signal ends, that is, when the signal returns to a stable DC level, the coupled signal will not exist, so crosstalk It only occurs in the process of signal transitions, and the faster the signal edge changes (conversion rate), the greater the crosstalk generated. The electromagnetic field coupled in the space can be extracted as a collection of countless coupling capacitors and coupling inductances. The crosstalk signal generated by the coupling capacitor can be divided into forward crosstalk and reverse crosstalk Sc on the victim network. These two signals have the same polarity; The crosstalk signal generated by the inductance is also divided into forward crosstalk and reverse crosstalk SL, and these two signals have opposite polarities. The forward crosstalk and reverse crosstalk generated by the coupled inductance and capacitance exist at the same time and are almost equal in size. In this way, the forward crosstalk signals on the victim network cancel each other due to the opposite polarity, and the reverse crosstalk polarity is the same, and the superposition is enhanced.
The modes of crosstalk analysis usually include default mode, three-state mode and worst-case mode analysis. The default mode is similar to the way we actually test the crosstalk, that is, the offending network driver is driven by a flip signal, and the victim network driver maintains the initial state (high level or low level), and then the crosstalk value is calculated. This method is more effective for crosstalk analysis of unidirectional signals. The tri-state mode means that the driver of the offending network is driven by a flip signal, and the tri-state terminal of the victim network is set to a high-impedance state to detect the size of the crosstalk. This method is more effective for two-way or complex topology networks. The worst-case analysis refers to keeping the driver of the victim network in the initial state, and the simulator calculates the sum of the crosstalk of all the default infringement networks to each victim network. This method generally only analyzes individual key networks, because there are too many combinations to be calculated and the simulation speed is relatively slow.
72. Is there a regulation on the copper area of the conduction band, that is, the ground plane of the microstrip line?
For microwave circuit design, the area of the ground plane has an impact on the parameters of the transmission line. The specific algorithm is more complicated (please refer to Angelen's EESOFT related information). In general PCB digital circuit transmission line simulation calculations, the ground plane area has no effect on the transmission line parameters, or ignores the impact.
73. In the EMC test, it was found that the harmonics of the clock signal exceeded the standard very seriously, but the decoupling capacitor was connected to the power supply pin. What aspects should be paid attention to in PCB design to suppress electromagnetic radiation?
The three elements of EMC are radiation source, transmission route and victim. The propagation path is divided into space radiation propagation and cable conduction. So to suppress harmonics, first look at the way it spreads. Power supply decoupling is to solve the propagation of conduction mode. In addition, necessary matching and shielding are also required.
74. Among the products with 4-layer board design, why some are double-sided paving, and some are not?
There are several considerations for the role of paving: 1. Shielding; 2. Heat dissipation; 3. Reinforcement; 4. PCB processing requirements. So no matter how many layers of slabs are laid, we must first look at the main reasons.
Here we mainly discuss high-speed issues, so we mainly talk about shielding. Surface paving is good for EMC, but copper paving should be as complete as possible to avoid islands. Generally, if there are more wiring on the surface layer,
It is difficult to ensure the integrity of the copper foil, and it will also bring about the problem of inter-segmentation of the inner layer signal. Therefore, it is recommended not to lay copper on the surface-layer devices or boards with many traces.
75. For a group of buses (address, data, command) driving multiple (up to 4, 5) devices (FLASH, SDRAM, other peripherals...), which method is used when PCB wiring?
The influence of wiring topology on signal integrity is mainly reflected in the inconsistent signal arrival time on each node, and the reflected signal also does not arrive at a certain node in the same time, which causes the signal quality to deteriorate. Generally speaking, in a star topology, you can control several stubs of the same length to make the signal transmission and reflection delays consistent to achieve better signal quality.
Before using the topology, it is necessary to consider the situation of the signal topology node, the actual working principle and the wiring difficulty. Different buffers have inconsistent effects on signal reflection, so the star topology cannot solve the delay of the data address bus connecting to flash and sdram, and thus cannot ensure the quality of the signal; on the other hand, high-speed signals generally For communication between dsp and sdram, the speed of flash loading is not high, so in high-speed simulation, you only need to ensure the waveform at the node where the actual high-speed signal works effectively, instead of paying attention to the waveform at the flash; star topology is compared with daisy chain and other topologies. In other words, wiring is more difficult, especially when a large number of data address signals use star topology.