PCB Proofing Technology Based on GENESIS2000 Software
1. Shape production
There are two ways to make shape:
1 According to the customer's light painting file
Production steps:
a Use Select by net in the panel to select the border of the component surface and copy it to the rout layer;
b Delete all arcs;
c Check the number of lines, for example, there should be four lines in a rectangle, delete the extra lines;
d Check the angle of the line. The angle of the conventional line should be 0°, 90° and 45°. If it is 0.1°, it is mostly because of the PCB design error of the customer, and the marketing department needs to seek the handling opinion;
e Use the function Rout-Connections to reconnect the intersection and chamfer of the line, the arc line attribute should be arc;
f Change the line width to r10mil.
2 Dimension according to customers
PCB proofing production steps:
a Create a rout layer in Matrix;
b Select item 5 in the Options-Line parameters function;
c Use the Add feature function in the panel to manually draw the outline according to the customer's marked size in the rout layer, and set the line width to r10mil;
d Use the Rout-Connections function to assist the intersection of the connecting lines and chamfering to the completion of the shape.
e If there are entities such as Rect or Oval in the Rout layer, they need to be converted into contour lines. Method: first select the entity and click EditàReshapeàcontourise to turn it into Surface, execute Surface to outline, and enter the line width value to convert it into a contour line.
After the profile is completed, use the Select by net command to select the profile graphic, and then use the Edit-Create-Profile command to create a profile.
Two orig production
The orig production consists of the following three parts:
1 layer counterpoint
Production steps:
a Select all layers, take the drilling as the reference layer, and use the register function to automatically align the circuit, ground, solder mask and drilling;
b Other layers (including the character layer) need to manually move the entire layer so that the outer frame overlaps with the outer frame of the circuit layer of the component surface, mirroring if necessary.
Inspection Method:
a The center of each layer of land should be aligned with the center of the drill hole;
b The outer frames of each layer should overlap each other;
c The characters on the component surface are normal characters, and the characters on the welding surface are reverse characters.
2 line to pad
PCB proofing production steps:
a Open the Features Histogram of the solder mask, select all in the Lines List, press Highlight, and compare the lines and characters to determine whether you need to transfer to the pad;
b Select and open the component surface line and component surface solder mask at the same time, press the W command to switch to the skeleton display mode, use the panel ↖ to select the line to be converted (usually the end of the line), and then use DFM-Cleanup-Construct pads (Ref. ) The functions are converted class by class. The welding surface method is the same;
c Use step a to check that all lines have been converted except for the border line and the large-area spray tin block;
d If an r-shaped line is converted to an oval-shaped pad, use the Actions-reference Selection function to select all oval reference solder masks on the circuit layer, and remove the oval covered by the solder mask (the same number as the solder mask oval). Use Edit-Reshape-Break command to interrupt the return line for other ovals, and finally move the removed oval back to the line layer. Use this operation with caution when there is a superposition of positive and negative.
3 Define SMD
Use the DFM-Cleanup-Set SMD attribute function, and set the parameter Types Other to * to automatically set the undrilled pads of the outer circuit to SMD.
Delete the original edit in Matrix and copy orig to edit. The following operations are carried out in edit unless otherwise specified.
Three Matrix production
Take the standard 4-layer board as an example, define the attributes of each layer, and use the X command to sort the layers according to the order of the board. (Table 1)
Drilling board drill positive
Shape board rout positive
Component surface character board silk_screen positive
Component surface solder mask board solder_mask positive
Component surface circuit board signal positive
Stratum board power_ground negative
Electrical layer board power_ground negative
Welding surface circuit board signal positive
Welding surface solder mask board solder_mask positive
Welding surface characters board silk_screen positive
1 The basis for the correct arrangement of levels is as follows:
a The customer provides the order of hierarchy;
b There are hierarchical marks outside the board;
c There are digital signs inside the board, such as "1, 2, 3, 4...".
2 The general basis for judging whether each layer is positive or negative is:
The center of the pad is solid and it is positive, and the center of the pad is hollow, which is negative.
Four drilling edit
1 Drilling production steps
a Open the Drill Tools Manager and check whether the hole diameter, number of holes and hole attributes in the drilling file are correct according to the drilling diagram provided by the customer. If there is no drilling diagram, the drilling file shall prevail;
b Change the properties of vias with smaller apertures and irregular distribution from plt to via;
c Enter the hole diameter corresponding to each hole according to "Drilling Tool Compensation Rules";
d Use Analysis-Fabrication-Drill Checks to analyze the drilling layer and check whether the analysis result is abnormal;
e If there is a heavy hole, use the NFP Removal function, select Duplicate as the parameter Delete, and automatically remove the drilled hole and the heavy disk of the corresponding layer;
f If there are cross holes, manually delete the smaller vias in the cross holes and the corresponding pads of each layer; if the device holes are crossed, they cannot be deleted, and two pre-drilled holes that are tangent to the cross hole should be added at both ends of the cross hole., Theoretically, the pre-drilled hole diameter = (cross hole center distance + cross hole diameter)/2, and then use the tailing method to select the hole diameter (in principle, the selected plate has the hole diameter). Example 2 The cross hole diameter is 2.15mm, the center distance is 1.00mm, and the calculated hole diameter is 1.575mm, then the pre-drilled hole diameter is 1.55mm.
2 Drilling groove production
a In the drilling layer, use the Edit-Reshape-Change Symbol command to change the desired drill slot shape to oval, for example, the drill slot is 3.00X1.00, and the shape is oval3X1;
b Break oval into a line with the Edit-Reshape-Break command;
c If the required length-to-width ratio of the drilling slot is less than 2, two pre-drilled holes should be added at both ends of the slot, and the method is the same as the cross hole.
Five drilling outline drawing production
PCB proofing production steps:
a Copy the rout layer to the new layer tmp with Edit-Copy-Other Layer command, and increase it by 5mil;
b In the tmp layer, use the Add feature function to mark the complete and correct outline dimensions, the line width of the dimension line and the extension line is r5mil, the arrow is special symbol-jian/jian45, and the size value is Text
The parameters are 80mil in XY, and the line width is 5mil;
c Use the Creat Drill Map function to automatically generate a drilling map, the unit is mm, and the drilling map is named map;
d Move all graphics in the tmp layer to the map layer, and the description text in the customer drilling diagram is also moved to the map layer, and merged into the drilling outline;
e Delete the tmp layer.
Six circuit layer production
1 Delete off-board graphics
a Select all the board layers except the rout layer, use the panel ↖ to select the outline borders one by one and delete
remove;
b Using the Clip Area function, select profile for the Method parameter, and outside for the Clip area parameter to automatically delete the off-board graphics;
c Check and delete the unremoved graphics from the edge of the board.
2 Pick the surface
a Select the component surface circuit layer, open the Feature selection filter function in the panel, select smd in Attributes and press select to select all surface stickers on the component surface circuit layer;
b Move all surface stickers on the component surface circuit layer to a new layer of gtl, and check whether the number of remaining pads on the component surface circuit layer is equal to the number of holes. If the number is equal, it proves that the surface mount attributes are completely defined. If they are not equal, you need to find out the pads with undefined surface mount attributes, select Edit-attributes-Chang function, select smd in the attributes, and then press OK to manually define the remaining surface stickers And moved to the gtl layer;
c Move all the graphics of the gtl layer back to the circuit layer of the component surface. If you need to compensate for the SMD, you can increase it as required while moving;
d Select all the surface stickers of the circuit layer of the component surface to increase by 11mil and copy to the new layer D10
e Find the identification point in the r-shaped D code of the D10 layer, determine the position of the identification point, add a copper ring to the identification point of the circuit layer on the component surface, the outer diameter of the copper ring is 1mm larger than the inner diameter, and the inner diameter is larger than the identification point solder mask opening window 1mm, do not touch the surrounding graphics;
f The PCB manufacturing method of the welding surface circuit layer is the same as above.
3 Line width compensation
a Select all circuit layers, turn on the Feature selection filter function in the panel, turn off the Pads, Surfaces, Text and Negative elements buttons, press select to select all the lines to be compensated, and then use the Edit-Resize-Global function to increase. For increased values, see b. For impedance control lines, perform individual compensation according to impedance requirements.
4 sets of counterpoints
Select all the board layers, use DFM-Pad Snapping function to make the pads of each layer align with the drilled layer, and the offset will not move if the offset is more than 2mil. The production staff needs to propose.
5 Circuit layer hole pad optimization
a Select the circuit layer of the component surface, use the DFM-Signal Layer Opt function, and optimize the pads according to the default parameters. Check the optimization results. If there is an ARG violation (min) report, it means that due to insufficient spacing, there are pads that have not been optimized. Undo this optimization step first, then open the column chart to check whether the aperture of the unoptimized pad belongs to Via or Plt, and then gradually reduce the solder ring parameters corresponding to this hole with 0.5mil as the level, and re-optimize until the optimization is completed. Maintain the existing parameters to optimize the welding surface circuit layer;
b The inner layer pad optimization method is the same as that of the outer layer;
c Move the circuit layer hole pad on the component surface to the gtl layer, change the attribute of the gtl layer to board + signal + positive, use the DFM-Signal Layer Opt function to re-optimize the gtl layer pad, and maintain the original settings of the parameters PTH AR and VIA AR. The parameters Spacing and Drill to cu are changed to 0. After the optimization is complete, move all the graphics in the gtl layer back to the component surface circuit layer. Repeat this step for the welding surface.
Note: All outer layers use the same optimized parameters, all inner layers also use the same optimized parameters, and the outer and inner parameters can be different.
6 No function pad removal
a Use the DFM-NFP Removal function to automatically remove the inner unconnected pads; turn off the PTH and Via options in the parameter Drill, and change the parameter Remove undrilled Pads to No to automatically remove the outer NPTH pads;
f Welding surface D11 is made in the same way, and the layer name is jobs-a.d11.
Nine solder mask production
a Select the circuit layer of the component surface, use DFM-Solder Mask Opt function to optimize the solder mask, select SHENNAN-E80 for ERF parameter, see b for Clearance Opt parameter setting;
b The solder mask opening is as large as possible under the condition of the allowable spacing (single-side solder mask opening ≥ 3mil, except for copper foil thickness ≥ 3OZ). In this way, the difficulty of on-site board alignment and the problem of ink pads are solved.
The specific manufacturing method and steps of the CAM veneer: the selection of the solder mask optimization parameters is determined by the minimum line spacing at the opening of the pad. With the GENESIS 2000 CAM software we are using, the solder mask window can only be optimized by one value. Solder mask optimization parameter clearance (min) + coverage (min) = spacing (min), where clearance: solder mask opening of the pad; coverage: distance from the window to the line; spacing: minimum spacing of the line. The method of selecting solder mask optimization parameters is: when the line spacing is ≥4mil, clearance (min)à2.5mil; clearance (opt)à3.0mil (depending on the spacing, it can be ≥3mil and the default is 3mil); coverage(min)à1. 5mil; coverage(opt)à1.5mil. In this way, the solder mask window can be 3mil in the place with large spacing in the board, and 3mil can not be achieved in the place with small spacing, and it can be made by 2.5mil.
c Open the graphics before and after optimization of the solder mask on the component surface at the same time, and there is no obvious size and shape change by visual inspection;
d Use Analysis-Fa