PCB Technical - On Several Misunderstandings in Circuit Design

On Several Misunderstandings in Circuit Design

Phenomenon 1: The PCB design requirements of this board are not high, so use a thinner thread and automatically fabricate it.
Comment: Automatic routing will inevitably take up a larger PCB area, and at the same time produce many times the number of vias than manual routing. In a large batch of products, the factors that PCB manufacturers consider for reducing prices are business factors, including line width and overpass. The number of holes, which respectively affect the yield of PCB and the number of consumption of drill bits, saves the cost of the supplier, and also finds a reason for the price reduction.
Phenomenon 2: These bus signals are all pulled by resistors, so I feel relieved.
Comment: There are many reasons why signals need to be pulled up and down, but not all of them need to be pulled. The pull-up and pull-down resistors pull a simple input signal, and the current is less than tens of microamperes, but when a driven signal is pulled, the current will reach the milliamp level. The current system often has 32 bits of address data each, and there may be If the 244/245 isolated bus and other signals are pulled up, a few watts of power consumption will be consumed on these resistors.

Phenomenon 3: How to deal with these unused I/O ports of CPU and FPGA? Leave it empty first, and talk about it later.
Comment: If the unused I/O port is left floating, it may become an input signal that repeatedly oscillates due to a little interference from the outside world, and the power consumption of MOS devices basically depends on the number of flips of the gate circuit. If it is pulled up, each pin will also have microampere current, so the best way is to set it as output (of course, no other signals with driving can be connected to the outside)
Phenomenon 4: There are so many doors left in this FPGA to use up, so you can play to your heart’s content
Comment: The power consumption of FGPA is directly proportional to the number of flip-flops used and the number of flips. Therefore, the power consumption of the same type of FPGA at different circuits and different times may differ by 100 times. Minimizing the number of flip-flops for high-speed flipping is the fundamental way to reduce FPGA power consumption.
Phenomenon 5: The power consumption of these small chips is very low, so there is no need to consider
Comment: It is difficult to determine the power consumption of the internal chip that is not too complicated. It is mainly determined by the current on the pin. An ABT16244 consumes less than 1 mA without load, but its indicator is each pin. It can drive a load of 60 mA (such as matching a resistance of tens of ohms), that is, the maximum power consumption of a full load can reach 60*16=960mA. Of course, only the power supply current is so large, and the heat falls on the load.
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