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PCB Technical

PCB Technical - PCB copy board engineers analyze what is PCB flying probe test

PCB Technical

PCB Technical - PCB copy board engineers analyze what is PCB flying probe test

PCB copy board engineers analyze what is PCB flying probe test

2021-09-12
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Author:Frank

What is PCB flying probe test? What is the role of PCB flying probe test in the circuit board production process? Maybe many people still don't know much about this problem. Below, the PCB copy board engineer will answer the question of what is a PCB flying probe test. The purpose of the PCB flying probe test is simply to test the electrical functions of the PCB. It is a system for testing the PCB board in the production environment of the PCB board. Flying probe testing uses four to eight independently controlled probes to move to the component under test instead of using all the traditional bed-of-nails interfaces on traditional online testing machines. The test unit (UUT, unit under test) is transported to the testing machine through a belt or other UUT transmission system. Then it is fixed, and the probe of the testing machine contacts the test pad and the via to test a single component of the UUT. The test probe is connected to the driver (signal generator, power supply, etc.) and sensor (digital multimeter, frequency counter, etc.) through a multiplexing system to test the components on the UUT. When a component is being tested, other components on the UUT are electrically shielded by the prober to prevent reading interference. After understanding the above knowledge, it is not difficult to understand what PCB flying probe test is.

pcb board

After knowing what PCB flying probe test is, how to perform flying probe test? The following describes the steps of making the flying probe test program:

First: Import the layer file, check, arrange, align, etc., and then rename the two outer layers to fronrear. The inner layer is renamed to ily02, ily03, ily04neg (if negative), rear, rearmneg.
Second: Add three layers, copy the two solder mask layers and the drilling layer to the added three layers, and change the name to fronmneg, rearmneg, mehole. Those with blind and buried vias can be named met01-02.,met02- 05, met05-06 and so on.
Third: Change the duplicated fronmneg and rearmneg to the round with the D code of 8mil. We call fronmneg the front test point and rearmneg the back test point.
Fourth: Delete the NPTH hole, find the via hole according to the line, and define the untested hole.
Fifth: Use fron and mehole as the reference layer, and change the fronmneg layer to on, and check to see if the test points are all in the window of the front layer. The test point in the hole larger than 100mil should be moved to the welding ring for testing. The test points at the BGA that are too dense must be misaligned. Some redundant intermediate test points can be deleted appropriately. The operation of the back layer is the same.
Sixth: Copy the organized test point fronmneg to the fron layer and rearmneg to the rear layer.
Seventh: Activate all layers and move to 10,10mm.
Eighth: The output gerber file is named fron, ily02, ily03, ily04neg, ilyo5neg, rear, fronmneg, rearmneg, mehole, met01-02, met02-09, and met09-met10 layers. Then use Ediapv software
First: guide all gerber files like fron, ily02, ily03, ily04neg, ilyo5neg, rear, fronmneg, rearmneg, mehole, met01-02, met02-09, met09-met10 layers.
Second: Generate the network. net annotation of artwork button.
Third: Generate test files. Make test programs button, enter the D code of the untested hole.
Fourth: save,
Fifth: Set the reference point and you are done. Then test it in the flying probe machine. Personal feelings: 1. Using this method to make test files often makes many test points, and the intermediate points cannot be deleted automatically.
2. Poor grasp of the hole test. Check the generated connectivity (open circuit) test points in ediapv, there is no test point for a single hole. Another example: there is a line on one side of the hole and no line on the other side. It is reasonable to test the hole on the side without a line. However, the test points generated by ediapv conversion are random, and sometimes they are right or wrong.
3 For the REAR surface solder mask without window opening, the name of the REAR layer can be named other names, so that in EDIAPV, it will not run out of the test point inexplicably.
4 If there is a MEHOLE window on both sides, but there are measurement points on both sides, you can press the make test programs button again. Note that you can place the cursor above the MEHOLE layer. In this way, the measuring point on the hole that has no window in the solder mask can be deleted.
5 Don't let the names of the above layers be wrong, otherwise you will be in trouble later.

After understanding what PCB flying probe test is, follow the steps of making the needle test program above to perform flying probe test.