PCB Technical - Apsim-spi of power integrity

In PCB design, the layout and quality analysis of high-speed circuits are undoubtedly the focus of discussion among engineers. Especially nowadays the working frequency of circuits is getting higher and higher. For example, it is very common for the application frequency of general digital signal processing (DSP) circuit boards to be in the range of 150-200MHz. It is not surprising that the CPU board reaches above 500MHz in practical applications. The design of Ghz circuits in the industry has become very popular. The design of all these PCB boards is often realized by multi-layer board technology. In the multi-layer board design, it is inevitable to adopt the design technology of the power layer. However, in the design of the power layer, the design becomes very complicated due to the mixed application of multiple types of power sources.

So what are the problems that linger among PCB engineers? How to define the number of PCB layers? How many layers are included? How to arrange the content of each layer in the most reasonable way? If there should be several layers of ground, how to alternately arrange signal layers and ground layers, etc.

How to design multiple types of power supply block systems? Such as 3.3V, 2.5V, 5V, 12V and so on. The reasonable division of the power layer and the common ground problem are a very important factor for the stability of the PCB.

How to design decoupling capacitors? Using decoupling capacitors to eliminate switching noise is a common method, but how to determine its capacitance? Where is the capacitor placed? When to use what type of capacitor and so on.

How to eliminate ground bounce noise? How does ground bounce noise affect and interfere with useful signals? How to eliminate Return Path noise? In many cases, the unreasonable circuit design is the key to the failure of the circuit, and the circuit design is often the job that engineers find helpless.

How to reasonably design the current distribution? Especially the design of current distribution in the ground layer is very difficult, and if the total current is distributed unevenly in the PCB board, it will directly and obviously affect the unstable operation of the PCB board.

In addition, there are some common signal problems such as overshoot, undershoot, ringing (oscillation), time delay, impedance matching, glitches, etc., but these problems are inseparable from the above problems. There is a causal relationship between them.

In general, the design of a high-quality high-speed PCB board should be considered in terms of signal integrity (SI---Signal Integrity) and power integrity (PI---Power Integrity). Although the more direct result is manifested in signal integrity, we must not neglect the design of power integrity in terms of its causes. Because power integrity directly affects the signal integrity of the final PCB board.

There is a very big misunderstanding among PCB engineers, especially those who have used traditional EDA tools for high-speed PCB design. Many engineers have asked us: "Why are the results analyzed by the SI signal integrity tool of the EDA inconsistent with the actual test results of our instruments, and the results of the analysis are often ideal?" In fact, this question is very simple. The reason for this problem is: on the one hand, the technical staff of the EDA manufacturer did not explain it clearly; on the other hand, it is the understanding of the simulation results of the PCB designer. We know that the most commonly used EDA tools in the Chinese market are SI (Signal Integrity) analysis tools. SI is an analysis based on wiring and device models without considering the influence of power supply, and most of them even analog devices. Regardless of (it is assumed to be ideal), it is conceivable that such analysis results and actual results must be in error. Because in most cases, the impact of power integrity in PCB boards is more serious than SI.

At present, although some EDA manufacturers have partially provided PI (Power Integrity) analysis functions, because their analysis functions are completely separated from SI (Signal Integrity), users still have no way to see the results that are close to the actual test results. Analysis report. PI and SI are closely related. And in many cases, the main reason that affects the odd change of the signal is the power supply system. For example, the decoupling capacitors are not well designed, the ground layer design is unreasonable, the loop influence is very serious, the current distribution is uneven, the ground bounce noise is too large, and so on.

As a PCB design engineer, I really want to see an analysis report close to the actual results, so that it is easy to correct and troubleshoot, and achieve the effect of the real simulation design. The emergence of SPI tools makes the above discussion possible. The English abbreviation of SPI is Signal-Power Integrity, as the name suggests, it is an analysis tool that integrates SI signal integrity and PI power integrity. So that SI and PI will no longer be carried out in isolation.

APSIM-SPI is the first in the industry and the only product that combines signal integrity and power integrity. With the SPI tool, PCB engineers can observe the waveform from the simulated waveform which is very close to the actual test with the instrument. In other words, the theoretical design and actual test are comparable from then on.

The conventional SI function is an isolated analysis under the assumption that the power layer etc. are in an ideal state. Although it has a great auxiliary effect, there is no overall effect, and it is difficult for users to simply eliminate errors based on the results of SI analysis. As an assumption, if a PCB board, because its VCC and GROUND lines are very thin, the circuit will naturally not work at this time. It is also easy to find that the odd changes in the signal are very serious with instruments such as an oscilloscope. But this kind of design is easy to imagine, if you use general SI analysis tools, you can't simulate the odd change of the signal. The situation at this time is that although the waveform of the simulation result is very complete and there is no singular change, it has actually been singularly changed to the point where it does not work. Therefore, an engineer once asked: "Why does the signal waveform in SI simulation do not change when we lay out the power and ground wires in the PCB board no matter how narrow?" The reason is that your PI is not considered in the SI simulation. In other words, your power cord and ground wire are not considered. To solve this problem, the only way is to use SPI tools. SPI fully considers the ground layer in the SI signal integrity analysis, including the ground wires in the signal layer, and large-area signal filling. The unstable signals or interference of these geoelectric layers will be completely superimposed on the SI simulation results. Only in this way can the real actual work effect be simulated, and of course the final result is close to the actual test result. It is convenient for engineers to visually consider and correct.

In order to realize the organic combination of SI and PI, APSIM-SPI has made major adjustments in terms of internal models, calculation methods, user interfaces, analysis functions, and simulation mechanisms. The purpose is to ensure the perfection of SPI function under the premise that the user is still convenient to use. For example, in RLGC modeling and distribution parameter extraction, the RLGC parameter extraction of SPI is much more complicated than the previous simple SI parameter extraction. Because in SPI must fully consider the parasitic parameters of the ground layer and the connection relationship between the ground layer and the signal line.

APSIM-SPI will fully consider the influence of the ground layer when analyzing the odd changes of the signal. Because SPI comprehensively considers the parasitic parameter model of the ground layer and the parameter model of signal wiring, as well as the device IBIS or SPICE model when modeling. Therefore, whether you design analog components such as decoupling capacitors, filter capacitors, terminal resistors, or the SSO switching noise, ground bounce noise, etc. generated by the circuit during operation, they will all be reflected in the final simulation result waveform.

Using APSIM's SPI tool, PCB engineers can visually observe the odd changes of the signal when designing the PCB board, and make timely adjustments. If you find that your ground wire is not wide enough, the signal will be noisy or even deformed. At this time, you can adjust the width of the ground wire until you are satisfied. How wide should the ground wire be in the past? Engineers can only debug by experience, and there is no tool to assist them in design guidance. And if the ground wire is not well laid out, the probability of causing the PCB board to not work will be very high. But today’s PCB boards are so complicated, not just the ground wire width, but also ground plane filling, multi-layer ground plane design, especially ground plane segmentation technology, etc. Different frequencies need to be used differently. Treatment method. If only limited experience can not meet the design requirements. Now with the help of APSIM-SPI, PCB engineers can easily know whether his ground plane and ground wire system design is reasonable and effective.

For example: When designing a multilayer board, many engineers often do not know whether to put the signal layer or the ground layer first when considering how to arrange each layer? Is the signal layer and ground layer alternately placed or concentrated? Now engineers can clearly get the best results based on the SPI simulation results.

Another example: when there are multiple power supplies on the ground plane, such as 3.3V ground, 2.5V ground, 5V ground, etc., how to divide it? In the past, engineers could only rely on limited experience, and they could only simply consider rationality from the boundary division. If the design in this area is unreasonable, the consequences can be imagined. I believe engineers have a deep experience. However, since the ground layer is often in the middle layer of the PCB board, it is difficult to modify it for debugging because it is not physically accessible at all. In fact, when designing a multi-power stratum, not only the boundary issues between various regions must be considered, but also filtering issues, common ground issues, and so on. With the SPI tool, engineers can easily carry out the rational design of multi-power supply area division. If it is unreasonable, the signal will be distorted during simulation, which was impossible before.

When dealing with ground bounce noise and SSO switching noise, everyone knows the severity of this noise (in EDA, this noise is summarized in the scope of PI power integrity analysis), especially high-speed PCB, often encounter unstable working conditions In fact, it is probably caused by switching noise or ground bounce noise. Engineers must also know some simple solutions. But when considered from a quantitative point of view, it is very complicated. For example: A simple and effective way to eliminate SSO switching noise is to add a filter capacitor between the power supply and the ground. The common method is to add some electrolytic capacitors of different qualities and types. It must be easy for engineers to quantitatively determine the maximum voltage of these capacitors. (As long as it can be calculated according to the working voltage of the PCB board), how to quantitatively determine the capacity of these capacitors (capacitance value) is often only based on experience, or refer to the design of other circuits. Because it will be very difficult to rely on theory to calculate. Especially now that the PCB circuit is so complicated, it is even more difficult to rely on manual calculations. The placement of the capacitor is also one of the factors that is not easy to determine. However, the placement of these electrolytic capacitors and the filtering effect they play will be closely related. (The common method is to place it at the power inlet of the PCB board).

Now using the APSIM-SPI tool, engineers can easily design and verify the effects of these filter capacitors. And effectively determine the placement of these capacitors and their capacitance value. Resolutely do not use excess capacitors, and there must be no less capacitors!

APSIM-SPI also has many features related to odd signal changes and simulation design. We believe that the current high-speed PCB board design must be carried out with advanced auxiliary means. SPI combines years of design experience and integrates advanced SI and PI analysis techniques to directly and truly simulate the specific working status of the PCB board, which is closer to Based on actual test results. SPI provides a brand-new debugging platform, making the transition to the simulation environment that has been designed based on experience for many years. Greatly improve the one-time design success rate of high-speed PCB. SPI has gradually become the most popular and necessary design analysis tool for high-speed PCB design engineers in the industry. SPI works closely with other PCB design tools in the industry. Such as Mentor Graphics, Cadence, PADS, Protel,...