PCB Blog - PCB board design always has impedance discontinuity, how to solve it

We all know that impedance must be continuous. But there is always a time when the impedance of the PCB board cannot be continuous, what should I do?

Characteristic impedance: Also known as "characteristic impedance", it is not a DC resistance and belongs to the concept of long-term transmission. In the high frequency range, during the signal transmission process, where the signal edge arrives, an instantaneous current will be generated between the signal line and the reference plane (power or ground plane) due to the establishment of an electric field. If the transmission line is isotropic, then as long as the signal is transmitting, there will always be a current I, and if the output voltage of the signal is V, during the signal transmission process, the transmission line will be equivalent to a resistance, the size is V/I , and this equivalent resistance is called the characteristic impedance Z of the transmission line. In the process of signal transmission, if the characteristic impedance of the transmission path changes, the signal will be reflected at the node with discontinuous impedance. The factors that affect the characteristic impedance are: dielectric constant, dielectric thickness, line width, and copper foil thickness.

(1) Gradient line

Some RF device packages are small, the SMD pad width may be as small as 12mils, and the RF signal line width may be more than 50mils. Gradient lines are used, and line width sudden changes are prohibited. The gradient line is shown in the picture, and the line in the transition part should not be too long.

(2) Corner

If the RF signal line runs at a right angle, the effective line width at the corner will increase, and the impedance will be discontinuous, causing signal reflection. To reduce discontinuities, there are two ways to deal with corners: chamfering and filleting. The radius of the arc angle should be large enough. Generally speaking, it should be ensured that: R>3W.

(3) Large pad

When there is a large pad on the 50 ohm microstrip line, the large pad is equivalent to distributed capacitance, which destroys the continuity of the characteristic impedance of the microstrip line. Two methods can be taken at the same time to improve: firstly, thickening the microstrip line medium, and secondly, hollowing out the ground plane under the pad, both of which can reduce the distributed capacitance of the pad.

(4) Vias

Vias are metal cylinders plated out of the through holes between the top and bottom layers of a circuit board. Signal vias connect transmission lines on different layers. Via stubs are unused parts of a via. Via pads are annular pads that connect vias to top or internal transmission lines. Isolation pads are annular voids within each power or ground plane to prevent shorts to the power and ground planes. The parasitic parameters of the vias can be modeled as the equivalent circuit model of the vias as a grounding capacitor connected in series at both ends of an inductor if they are derived through rigorous physical theory derivation and approximate analysis. The equivalent circuit model of the via, it can be seen from the equivalent circuit model that the via itself has parasitic capacitance to the ground. Assume that the diameter of the anti-pad of the via is D2, the diameter of the via pad is D1, and the thickness of the PCB board is T, the dielectric constant of the board substrate is ε, the parasitic capacitance of the via hole is similar to: the parasitic capacitance of the via hole can cause the signal rise time to be prolonged and the transmission speed to slow down, thereby deteriorating the signal quality. Similarly, vias also have parasitic inductance. In high-speed digital PCB boards, the harm caused by parasitic inductance is often greater than that of parasitic capacitance. Its parasitic series inductance will weaken the contribution of the bypass capacitor, thereby reducing the filtering effect of the entire power system. Suppose L is the inductance of the via, h is the length of the via, and d is the diameter of the center hole. The approximate parasitic inductance of vias is similar to: vias are one of the important factors that cause impedance discontinuities on the RF channel. If the signal frequency is greater than 1GHz, the influence of vias should be considered. Common methods to reduce the discontinuity of via impedance include: using a diskless process, selecting a lead-out method, and optimizing the diameter of the anti-pad. Optimizing the anti-pad diameter is a common method to reduce impedance discontinuities. Since the characteristics of the via hole are related to the structure size of the aperture, pad, anti-pad, stack structure, and lead-out method, it is recommended to use HFSS and Optimetrics to optimize the simulation according to the specific situation in each design. When a parametric model is employed, the modeling process is simple. During the review, the PCB board designer is required to provide corresponding simulation documents. Via diameter, pad diameter, depth, anti-pad, all bring variations, resulting in impedance discontinuities, severity of reflection and insertion loss.

(5) Through-hole coaxial connector

Similar to the via structure, through-hole coaxial connectors also have impedance discontinuities, so the solution is the same as vias. Common methods for reducing impedance discontinuities in through-hole coaxial connectors are also: using a diskless process, a suitable lead-out method, and optimizing the diameter of the anti-pad on PCB board.