PCB Blog - Analysis of PCB board design and signal integrity

1. Signal integrity analysis
Factors related to SI: reflections, crosstalk, radiation. Reflection is caused by impedance mismatch on the transmission path; crosstalk is caused by line spacing; radiation is related to the high-speed device itself and the PCB board design.

Transmission line judgment
Using the previous formula for judging high-speed signals, the signal frequency and transmission path length need to be considered for the distinction between high-speed and low-speed.

Judgment steps:
1) Obtain the effective frequency Fknee of the signal and the trace length L;
2) Use Fknee to calculate the effective wavelength λknee of the signal, that is, λknee=C/Fknee;
3) Judging the relationship between L and 1/6xλknee, if L>1/6xλknee, the signal is a high-speed signal, otherwise it is a low-speed signal; where λknee=C/Fknee; where C is a speed slightly lower than the speed of light, Fknee= 0.5/Tr (10%~90%), it should also be noted that if there is no ready-made board for the signal of 100M frequency, the effective frequency Fknee can be estimated, and Fknee is about 7 times the Fclock (signal period) ). If L>1/6xλknee, it is regarded as a transmission line, and the transmission line must consider the reflection of the signal that may be caused by impedance mismatch during the transmission process. Reflection formula: signal reflection ρ=(Z2-Z1)/(Z2+Z1); where Z2 is the line impedance after the reflection point; Z1 is the line impedance before the reflection; the possible value of ρ is ±1, 0, when it is When it is 0, it is completely absorbed, and when it is ±1, it is reflected. The reflection of the signal is caused by the mismatch of the impedance of the origin, transmission path, and termination. Reducing reflection method: In order to reduce the reflection of the signal as much as possible, Z2 and Z1 need to be as close as possible. There are several methods for impedance matching: series matching at the sending end, parallel matching at the receiving end, voltage division matching at the receiving end, parallel matching of resistance and capacitance at the receiving end, and parallel matching of diodes at the receiving end.
4) Receiver voltage divider matching
5) Parallel matching of resistance and capacitance at the receiving end
Advantages: less power consumption;
Disadvantage: There is a mismatch between the high and low levels of the receiving end. Due to the existence of the capacitor, the edge change of the signal will be slowed down.

2. Signal circuit
The signal loop mainly includes two paths, one is the driving path and the other is the loop path. The signal level measured at the sending end, the transmission path and the receiving end is essentially the voltage of the signal at the corresponding position on the driving path and the return path. value, both paths are very important. To provide a complete return path, the following points need to be noted:
1) When the signal layer is changed, do not change the reference layer. If the signal is changed from signal layer 1 to signal layer 2, the reference layer is the bottom layer 1. In this case, the return path does not need to change layers, that is, the signal Changing layers has no effect on its return path.
2) When the signal changes layers, the network properties of the reference layer are not changed. That is, the reference layer at the beginning of signal 1 is power layer 1/ground layer 1. After changing layers, the reference layer of signal 1 is power layer 2/ground layer 2. The network properties of the reference layer remain unchanged, all of which are GND or power properties. The return path can be routed using nearby GND or power vias. Here, in the case of high speed, the capacitive and inductive reactance of the vias cannot be ignored. In this case, the vias should be minimized to reduce the influence of the impedance change caused by the vias themselves, and reduce the influence on the signal return path.
3) When the signal layer is changed, a via hole with the same attribute as the reference layer is added near the signal via hole.
4) If the network properties of the two reference layers are different before and after the layer change, the two reference layers are required to be close to each other to reduce the impedance between layers and the voltage drop on the return path.
5) When the signals of changing layers are dense, a certain distance should be maintained between the nearby ground or power vias. When there are many signals of changing layers, it is necessary to make more vias to the ground or to the power supply.

3. Crosstalk
The solution to crosstalk is that high-speed signals PCB board, clock signals, other data signals, etc., the spacing satisfies the 3W principle.