PCB Blog - PCB Layout Techniques to Optimize Power Module Performance

Starting from the layout of the power supply PCB board, this paper introduces the PCB layout methods, examples and techniques to optimize the performance of the power supply module. When planning a power supply layout, the first consideration is the physical loop area of the two switched current loops. Although these loop areas are largely invisible in the power module, it is still important to understand the respective current paths of the two loops as they extend beyond the module. The current self-conducting input bypass capacitor (Cin1) passes through the high-side MOSFET during the continuous on-time of the MOSFET, reaches the internal inductor and the output bypass capacitor (CO1), and returns to the input bypass capacitor. formed during the off-time of the internal high-side MOSFET and the on-time of the low-side MOSFET. The energy stored in the internal inductor flows through the output bypass capacitor and low-side MOSFET back to GND. The region where the two loops do not overlap each other (including the boundary between the loops) is the high di/dt current region. The input bypass capacitor (Cin1) plays a key role in supplying high frequency current to the converter and returning it to its source path. The output bypass capacitor (Co1) does not carry as much AC current, but it acts as a high frequency filter for switching noise. For the above reasons, the input and output capacitors should be placed as close as possible to their respective VIN and VOUT pins on the module. As shown in Figure 2, the inductance from these connections can be minimized by keeping the traces between the bypass capacitors and their respective VIN and VOUT pins as short and wide as possible.

Reducing the inductance in the PCB board layout has two major benefits. By promoting the energy transfer between Cin1 and CO1 to improve the device performance. This will ensure that the module has good high frequency bypassing, reducing inductive voltage peaks from high di/dt currents. It also reduces device noise and voltage stress to ensure proper operation. Second, to reduce EMI. Connecting a capacitor with less parasitic inductance will exhibit a low impedance characteristic to high frequencies, thereby reducing conducted radiation. Ceramic capacitors (X7R or X5R) or other low ESR type capacitors are recommended. Adding more input capacitors will only work if the additional capacitors are placed close to the GND and VIN terminals. Power modules are uniquely designed to inherently have low radiated and conducted EMI, and following the PCB layout guidelines presented in this article will yield higher performance. Path planning for loop currents is often overlooked, but it plays a key role in optimizing power supply designs. In addition, the ground trace to Cin1 and CO1 should be shortened and widened as much as possible, and connected directly to the exposed pad, which is especially important for the input capacitor (Cin1) ground connection with high AC current. Ground pins (including exposed pads), input and output capacitors, soft-start capacitors, and feedback resistors in the module should all be connected to the return layer on the PCB. This return layer can be used as a return path for very low inductor current and as a heat sink as discussed below. The feedback resistor should also be placed as close as possible to the FB (feedback) pin of the module. To minimize the potential noise extraction at this high impedance node, it is critical to keep the trace between the FB pin and the center tap of the feedback resistor as short as possible. Available compensation components or feedforward capacitors should be placed as close as possible to the upper feedback resistors.

Thermal Design Recommendations
While the compact layout of the module provides electrical benefits, it has a negative impact on the thermal design, dissipating an equivalent amount of power from a smaller space. With this in mind, a single large exposed pad is designed on the back of the power module package and is electrically grounded. This pad helps provide very low thermal impedance from the internal MOSFET (which usually generates most of the heat) to the PCB. The thermal impedance (θJC) from the semiconductor junction to the outer package of these devices is 1.9°C/W. While reaching the industry's θJC value is ideal, low θJC values are meaningless when the thermal impedance (θCA) of the outer package to air is too great! Without a low-impedance heat dissipation path to the surrounding air, the heat* cannot be dissipated on the exposed pad. So, what exactly determines the θCA value? The thermal resistance from the exposed pad to air is completely controlled by the PCB design and the associated heat sink. Now for a quick look at how to do a simple PCB thermal design without a heat sink, since the thermal impedance between the junction and the top of the outer package is relatively high compared to the thermal impedance from the junction to the die pad, in this estimate from When considering the thermal resistance (θJT) from the junction to the surrounding air, we can ignore the θJA heat dissipation path. The first step in thermal design is to determine the power to be dissipated. The power dissipated by the module (PD) can be easily calculated using the efficiency graph (η) published in the datasheet. We then use the two temperature constraints of the design, TAmbient and the rated junction temperature, TJunction (125°C), to determine the thermal resistance required for the module packaged on the PCB. We use a simplified approximation of convective heat transfer from the surface of a PCB (with undamaged one-ounce copper heat sinks and numerous thermal vias on both the top and bottom layers) to determine the board area required for heat dissipation. The required PCB area approximation does not take into account the role of thermal vias that transfer heat from the top metal layer (where the package is connected to the PCB) to the bottom metal layer. The bottom layer acts as a second surface layer from which convection can transfer heat away from the plate. For a valid board area approximation, use at least 8-10 thermal vias. The thermal resistance of the thermal vias is approximated by the following equation values. This approximation is for a typical through hole with a diameter of 12 mils and 0.5 oz copper sidewalls. Design as many heat dissipation holes as possible in the entire area under the exposed pad, and make these heat dissipation holes form an array with a pitch of 1 to 1.5mm. Power modules provide an alternative to complex power supply designs and typical PCB layouts associated with DC/DC converters. While the layout challenges have been eliminated, some engineering work still needs to be done to optimize module performance with good bypass and thermal PCB board design.