PCB Blog - Electromagnetic Compatible Multilayer PCB Board Wiring Design

In the printed circuit boards,it is very important to consider the electromagnetic compatibility (EMC) design in the circuit design stage. Taking a 12-layer board as an example, the layering method, wiring rules, ground and power line layout, and electromagnetic compatibility. Electromagnetic compatibility is an emerging comprehensive subject, which mainly studies electromagnetic interference and anti-interference problems. Electromagnetic compatibility means that under the specified electromagnetic environment level, the performance index of electronic equipment or systems will not be reduced due to electromagnetic interference, and the electromagnetic radiation generated by them itself is not greater than the limited limit level, which does not affect the normal operation of other systems. And to achieve the purpose of non-interference between equipment and equipment, system and system, common and reliable work. Electromagnetic interference (EMI) is caused by the electromagnetic interference source transferring energy to the sensitive system through the coupling path. It includes three basic forms: conduction by wire and common ground, space radiation or near-field coupling. Practice has proved that even if the circuit schematic design is correct and the printed circuit board is improperly designed, it will adversely affect the reliability of electronic equipment. Therefore, ensuring the electromagnetic compatibility of the printed circuit board is the key to the entire system design. This article mainly discusses electromagnetic compatibility. Technology and its application in the design of multilayer printed circuit boards.

The PCB board is the support of circuit components and devices in electronic products. It provides electrical connections between circuit components and devices, and is a basic component of various electronic devices. Nowadays, large-scale and very large-scale integrated circuits have been widely used in electronic equipment, and the mounting density of components on printed circuit boards is getting higher and higher, and the transmission speed of signals is getting faster and faster. EMC issues are also becoming more and more prominent. PCB boards are divided into single-sided (single-layer boards), double-sided (double-layer boards) and multi-layer boards. Single-sided and double-sided boards are generally used for low- and medium-density wiring circuits and circuits with low integration, and multi-layer boards use high-density wiring and circuits with high integration. From the perspective of electromagnetic compatibility, single-sided and double-sided circuits are not suitable for high-speed circuits, and single-sided and double-sided wiring can no longer meet the requirements of high-performance circuits, and the development of multi-layer wiring circuits provides a possibility to solve the above problems. Applications are becoming more and more widespread.

1. Characteristics of multi-layer wiring
The PCB board is composed of organic and inorganic dielectric materials with a multi-layer structure. The connection between the layers is achieved through vias, and the electrical signal conduction between the layers can be achieved by plating or filling the vias with metal materials. The reason why multi-layer wiring is widely used has the following characteristics:
(1) There are special power supply layer and ground wire layer inside the multi-layer board. The power supply layer can be used as a noise loop to reduce interference; at the same time, the power supply layer also provides a loop for all signals of the system to eliminate common impedance coupling interference. The impedance of the power supply line is reduced, thereby reducing the common impedance interference.
(2) The multi-layer board adopts a special ground layer, which has a special ground wire for all signal lines. The characteristics of the signal line: the impedance is stable and easy to match, which reduces the waveform distortion caused by reflection; at the same time, a special ground wire is used. The line layer increases the distributed capacitance between the signal line and the ground line, reducing the crosstalk,

2. Laminate design of printed circuit boards
2.1 Wiring rules of PCB board
Electromagnetic compatibility analysis of multilayer circuit boards can be based on Kirchhoff's law and Faraday's law of electromagnetic induction. According to Kirchhoff's law, any time-domain signal transmission from source to load must have an impedance path. PCB boards with multiple layers are often used in high-speed, high-performance systems, where multiple layers are used for direct current (DC) power or ground reference planes. These planes are usually solid planes without any divisions, since there are enough layers to be used as power or ground planes, so there is no need to put different DC voltages on the same layer. This layer will serve as the current return path for the signals on the transmission lines adjacent to them. Creating a low impedance current return path is an important EMC goal for these planar layers. The signal layers are distributed between the physical reference plane layers, and they can be either symmetric striplines or asymmetric striplines. Take a 12-layer board as an example to illustrate the structure and layout of a multi-layer board. Its hierarchical structure is T - P - S - P - S - P - S - P - S - S - P - B, "T" is the top layer, "P" is the reference plane layer, "S" is the signal layer, "B" is the bottom layer. From the top layer to the bottom layer are the first layer, the second layer, and the 12th layer. The top and bottom layers are used as pads for components, and signals should not travel too long on the top and bottom layers in order to reduce direct radiation from traces. Incompatible signal lines should be isolated from each other, the purpose of which is to avoid coupling interference with each other. High frequency and low frequency, large current and small current, digital and analog signal lines are incompatible. In the component layout, the incompatible components should be placed in different positions on the printed board, and the layout of the signal lines is still necessary. Take care to isolate them. When designing, pay attention to the following 3 issues:
(1) Determine which reference plane layer will contain multiple power regions for different DC voltages. Assuming multiple DC voltages on layer 11, this means that designers must keep high-speed signals as far away as possible from layer 10 and the bottom layer, because return current cannot flow through the reference plane above layer 10, and stitching capacitors are required, 3rd, 5, 7 and 9 are the signal layers for high-speed signals, respectively. The traces of important signals should be routed in one direction as much as possible in order to optimize the possible number of trace channels on the layer. The signal traces distributed on different layers should be perpendicular to each other, which can reduce the coupling interference of electric and magnetic fields between the lines. The 3rd and 7th layers can be set as "east-west" traces, while the 5th and 9th layers can be set as "east-west" traces. Run the line for "North-South". Which layer the trace is routed on depends on the direction in which it reaches its destination.
(2) Layer changes when routing high-speed signals, and which different layers are used for an independent routing, to ensure that the return current flows from one reference plane to the new reference plane needed. This is to reduce the signal loop area and reduce the differential mode current radiation and common mode current radiation of the loop. The loop radiation is proportional to the current intensity and the loop area. In fact, the design does not require the return current to change the reference plane, but simply changes from one side of the reference plane to the other. For example, a combination of signal layers can be used as a signal layer pair: Layer 3 and Layer 5, Layer 5 and Layer 7, Layer 7 and Layer 9, which allow an east-west and north-south direction to form a wiring combination. But the combination of layers 3 and 9 should not be used, as this requires return current to flow from layer 4 to layer 8. Although a decoupling capacitor can be placed near the via, at high frequencies the capacitor is rendered useless by the presence of lead and via inductance. And this kind of wiring will increase the area of the signal loop, which is disadvantageous to reduce the current radiation.
(3) Select the DC voltage for the reference plane layer. In this example, there is a lot of noise on the power/ground reference pins due to the high speed of signal processing inside the processor. Therefore, it is very important to use decoupling capacitors to provide the same DC voltage to the processor, and to use decoupling capacitors as efficiently as possible. The way to reduce the inductance of these components is to keep the connection traces as short and wide as possible, and to keep the vias as short and thick as possible. If layer 2 is assigned as "ground" and layer 4 is assigned as power for the processor, the vias should be as short as possible from the top layer where the processor and decoupling capacitors are placed. The void remainder extending to the bottom layer of the board does not contain any significant current and the short distance does not have an antenna effect.

2.2 The 20-H Rule and the 3-W Rule
In the electromagnetic compatibility design of multi-layer PCB boards, there are two basic principles to determine the distance between the power layer and the edge of the multi-layer board and to solve the distance between the printed strips: the 20-H rule and the 3-W rule. 20-H principle: RF current usually exists at the edge of the power plane due to the connection between the magnetic fluxes. This coupling between layers is called the edge effect. When using high-speed digital logic and clock signals, the power planes will interact with each other. coupled RF current. In order to reduce this effect, the physical size of the power plane should be at least 20H smaller than the physical size close to the ground plane (H is the distance between the power plane and the ground plane), and the edge effect of the power supply usually occurs at about 10H. About 10% of the magnetic flux is blocked, if you want to achieve 98% of the magnetic flux is blocked, you need a boundary value of 100%. The 20-H rule determines the physical distance between the power plane and the nearest ground plane, including copper thickness, prefill, and insulating separation layers. Using 20-H can increase the resonant frequency of the PCB itself.

RF edge effects on PCB boards
3-W rule: When the distance between the two printed lines is small, electromagnetic crosstalk will occur between the two lines, which will make the related circuit malfunction. To avoid this interference, the distance between any lines should be kept no less than 3 times. Line width, that is, not less than 3W (W is the width of printed lines). The printed line width depends on the line impedance requirements, too wide will affect the wiring density, too narrow will affect the integrity and strength of the signal transmitted to the terminal. The wiring of clock circuits, differential pairs, and I/O ports are all basic application objects of the 3-W principle. The 3-W principle only represents the boundary of the electromagnetic flux line where the crosstalk energy is attenuated by 70%. If the requirements are higher, such as the boundary line of the electromagnetic flux that guarantees the crosstalk energy attenuation by 98%, a 10W interval must be used.

2.3 Layout of the ground wire
First of all, to establish the concept of distributed parameters, above a certain frequency, any metal wire should be regarded as a device composed of resistance and inductance. Therefore, the ground lead has a certain impedance and constitutes an electrical loop, whether it is single-point grounding or multi-point grounding, it must form a low-impedance loop into the real ground or rack. A typical trace of 25mm long will exhibit approximately 15 to 20nH inductance, and the presence of distributed capacitance will form a resonant circuit between the ground plane and the equipment rack. Second, when ground current flows through the ground wire, transmission line effects and antenna effects occur. When the length of the line is 1/4 wavelength, it shows a high impedance, the ground wire is actually open, and the ground wire becomes an antenna that radiates outward, and the ground plate is full of high-frequency currents and eddy currents formed by disturbance. Therefore, many loops are formed between ground points, and the diameter of these loops (or ground point spacing) should be less than 1/20 of the frequency wavelength. Choosing the right device is an important factor for the success of the design, especially when choosing a logic device, try to choose a logic device with a rise time longer than 5ns, and never choose a logic device with a faster timing sequence than the circuit requires.

2.4 Arrangement of power cords
For multi-layer boards, the power supply layer-ground structure is used for power supply. The characteristic impedance of this structure is much smaller than that of the track pair, which can be less than 1Ω. This structure has a certain capacitance, and it is not necessary to add high-frequency decoupling capacitors next to each integrated chip. Even if the capacitance of the layer capacitor is not enough, when an external decoupling capacitor is required, it should not be added next to the integrated chip, but can be added anywhere on the printed board. The power pins and ground pins of the integrated chip can be directly connected to the power supply layer and the ground layer through metallized through holes, so the power supply loop is always there. Due to the principle of "current always takes the impedance path", the high-frequency return flow on the ground always follows the trace, unless there is a ground gap to block it, so the signal loop is always there. It can be seen that the power layer-ground structure has the advantages of simple and flexible layout and good electromagnetic compatibility compared with the power supply of the rail pair.

3. Conclusion
In short, in the design of multi-layer PCB boards, components should be placed in groups to prevent inter-group interference; high-speed circuits should be arranged properly to avoid interference with other circuits through electric field coupling or magnetic field coupling; Common ground line impedance coupling interference; the area of the power supply loop should be reduced to a certain extent, and the power supply loops of different power supplies should not overlap to avoid magnetic field coupling; incompatible signal lines should be isolated from each other to avoid coupling interference; Small signal loop area to reduce loop radiation and common mode radiation on PCB board.