There are many models that can be used for PCB board-level signal integrity analysis in electronic design. Three of the most commonly used are SPICE, IBIS and Verilog-A.
a. SPICE model
SPICE is a powerful general-purpose analog circuit simulator. Now the SPICE model has been widely used in electronic design, and two main versions have been derived: HSPICE and PSPICE. HSPICE is mainly used in integrated circuit design, while PSPICE is mainly used in PCB board and system-level design.
The SPICE model consists of two parts: Model Equations and ModelParameters. Since the model equation is provided, the SPICE model and the simulator's algorithm can be very closely connected, and better analysis efficiency and analysis results can be obtained.
When using the SPICE model to perform SI analysis at the PCB board level, integrated circuit designers and manufacturers are required to provide a detailed and accurate description of the SPICE model of the integrated circuit I/O unit sub-circuit and the manufacturing parameters of the semiconductor characteristics. Because these materials usually belong to the intellectual property and confidentiality of designers and manufacturers, only a few semiconductor manufacturers will provide corresponding SPICE models while providing chip products.
The analysis accuracy of the SPICE model mainly depends on the source of the model parameters (that is, the accuracy of the data) and the applicable scope of the model equations. The combination of model equations with various digital simulators may also affect the accuracy of the analysis. In addition, the PCB board-level SPICE model has a large amount of simulation calculation, and the analysis is relatively time-consuming.
b. IBIS model
The IBIS model was originally developed by Intel Corporation specifically for PCB board-level and system-level digital signal integrity analysis. It is now managed by the IBIS Open Forum and has become an official industry standard (EIA/ANSI 656-A).
The IBIS model uses I/V and V/T tables to describe the characteristics of digital integrated circuit I/O units and pins. Since the IBIS model does not need to describe the internal design of the I/O unit and transistor manufacturing parameters, it has been welcomed and supported by semiconductor manufacturers. Now all major digital integrated circuit manufacturers can provide corresponding IBIS models while providing chips.
The analysis accuracy of the IBIS model mainly depends on the number of data points in the I/V and V/T tables and the accuracy of the data. Since the PCB board-level simulation based on the IBIS model uses table lookup calculations, the amount of calculation is small, usually only 1/10 to 1/100 of the corresponding SPICE model.
c. Verilog-AMS model and VHDL-AMS model
Verilog-AMS and VHDL-AMS appeared less than 4 years ago, and they are a new standard. As hardware behavior-level modeling languages, Verilog-AMS and VHDL-AMS are supersets of Verilog and VHDL, respectively, while Verilog-A is a subset of Verilog-AMS.
Different from the SPICE and IBIS models, in the AMS language, it is up to the user to write the equations describing the behavior of the components. Similar to the IBIS model, the AMS modeling language is an independent model format that can be used in many different types of simulation tools. AMS equations can also be written at many different levels: transistor level, I/O cell level, I/O cell group, etc.
Since Verilog-AMS and VHDL-AMS are new standards, only a few semiconductor manufacturers can provide AMS models so far, and there are fewer simulators that can support AMS than SPICE and IBIS. However, the feasibility and calculation accuracy of the AMS model in the PCB board-level signal integrity analysis are not inferior to the SPICE and IBIS models.
The above is the introduction of the SI model of PCB design. Ipcb is also provided to PCB manufacturers and PCB manufacturing technology.