Electronic Design - EMC/EMI control technology in PCB circuit board design

With the improvement of IC device integration, the gradual miniaturization of equipment and the increasing speed of devices, the EMI problem in electronic products has become more serious. From the point of view of EMC/EMI design of system equipment, properly handling EMC/EMI issues during the PCB design stage of the equipment is the most effective and lowest cost method for system equipment to meet electromagnetic compatibility standards. This article introduces EMC/EMI control technology in digital circuit PCB design.

1. Principle of EMI generation and suppression

The generation of EMI is caused by the electromagnetic interference source transmitting energy to the sensitive system through the coupling path. It includes three basic forms: conduction via wire or common ground, radiation through space, or near-field coupling. The hazard of EMI is manifested in reducing the quality of the transmission signal, causing interference or even damage to the circuit or equipment, making the equipment unable to meet the technical index requirements specified by the electromagnetic compatibility standard.

In order to suppress EMI, the EMI design of digital circuits should be carried out according to the following principles:

According to the relevant EMC/EMI technical specifications, the indicators are decomposed into single-board circuits for hierarchical control.

2. EMC/EMI control technology of digital circuit PCB

When dealing with various forms of EMI, specific problems must be analyzed in detail. In the PCB design of digital circuits, EMI can be controlled from the following aspects.

Device selection:

When designing EMI, we must first consider the speed of the selected device. In any circuit, if a device with a rise time of 5ns is replaced with a device with a rise time of 2.5ns, EMI will increase by about 4 times. The radiation intensity of EMI is proportional to the square of the frequency. The highest EMI frequency (fknee) is also called the EMI emission bandwidth. It is a function of the signal rise time rather than the signal frequency: fknee = 0.35/Tr (where Tr is the signal rise time of the device )

The frequency range of this radiated EMI is 30MHz to several GHz. In this frequency band, the wavelength is very short, and even very short wiring on the circuit board may become a transmitting antenna. When the EMI is high, the circuit easily loses its normal function. Therefore, in the selection of devices, under the premise of ensuring the performance requirements of the circuit, low-speed chips should be used as much as possible, and a suitable driving/receiving circuit should be adopted.

Stacked design:

Under the premise of cost permitting, increasing the number of ground plane layers and placing the signal layer close to the ground plane layer can reduce EMI radiation. For high-speed PCBs, the power plane and ground plane are closely coupled, which can reduce the power supply impedance, thereby reducing EMI.

layout:

According to the signal current flow, a reasonable layout can reduce the interference between signals. Reasonable layout is the key to controlling EMI. The basic principles of the layout are:

• The clock line is the main source of interference and radiation. Keep it away from sensitive circuits and make the clock trace the shortest;

• The connector should be arranged on one side of the board as far as possible and far away from the high-frequency circuit;

Fully consider the feasibility of the layout for power supply division, and multi-power devices should be placed across the boundary of the power supply division area to effectively reduce the impact of plane division on EMI;

wiring:

■ Impedance control: High-speed signal lines will show the characteristics of transmission lines, and impedance control is required to avoid signal reflection, overshoot and ringing, and reduce EMI radiation.

To understand the flow direction of each key signal, the key signal should be routed close to the return path to ensure that its loop area is the smallest.

For low-frequency signals, make the current flow through the path with the least resistance; for high-frequency signals, make the high-frequency current flow through the path with the least inductance, not the path with the least resistance (see Figure 1). For differential mode radiation, the EMI radiation intensity (E) is proportional to the current, the area of the current loop, and the square of the frequency. (I is the current, A is the loop area, f is the frequency, r is the distance to the center of the loop, and k is a constant.)

Therefore, when the minimum inductance return path is just below the signal wire, the current loop area can be reduced, thereby reducing the EMI radiation energy.

▪ The key signal must not cross the segmented area.

. to ensure that the strip line, microstrip line and its reference plane meet the requirements.

The lead wire of the decoupling capacitor should be short and wide.

. All signal traces should be as far away from the edge of the board as possible.

For multi-point connection network, select the appropriate topological structure to reduce signal reflection and reduce EMI radiation.

EMC/EMI control technology in PCB design-wiring-signal loop

Split processing of the power plane:

Division of power layer

When there are one or more sub-power supplies on a main power plane, ensure the continuity of each power supply area and sufficient copper foil width. The dividing line does not need to be too wide, generally 20-50mil line width is enough to reduce the gap radiation.

Division of the ground layer

The ground plane should be kept intact to avoid splitting. If it must be divided, it is necessary to distinguish between digital ground, analog ground and noise ground, and connect to the external ground through a common ground point at the exit.

In order to reduce the edge radiation of the power supply, the power/ground plane should follow the 20H design principle, that is, the size of the ground plane is 20H larger than the size of the power plane (see Figure 2), so that the fringe field radiation intensity can be reduced by 70%.

In order to reduce the edge radiation of the power supply, the power/ground plane should follow the 20H design principle, that is, the size of the ground plane is 20H larger than the size of the power plane, so that the fringe field radiation intensity can be reduced by 70%.

3. Other control methods of EMI

Power system design:

■ Use filters to control conducted interference.

■ power supply decoupling. In EMI design, providing reasonable decoupling capacitors can make the chip work reliably, reduce high-frequency noise in the power supply, and reduce EMI. Due to the influence of wire inductance and other parasitic parameters, the response speed of the power supply and its power supply wires is slow, which makes the instantaneous current required by the driver in the high-speed circuit insufficient. Reasonably design the bypass or decoupling capacitors and the distributed capacitors of the power supply layer, so that the energy storage effect of the capacitor can be used to quickly provide current to the device before the power supply responds. Correct capacitive decoupling can provide a low-impedance power path, which is the key to reducing common-mode EMI.

Grounding:

• The grounding design is the key to reducing the EMI of the whole board.

Determine to use single-point grounding, multi-point grounding or mixed grounding.

• If there is no ground wire layer in the double panel design, it is important to design the ground wire grid reasonably, and ensure that the width of the ground wire>the width of the power wire>the width of the signal wire. A large-area paving method can also be used, but it is necessary to pay attention to the continuity of the large-area on the same floor.

For multilayer board design, ensure that there is a ground plane layer to reduce the common ground impedance.

EMI analysis and testing:

· Simulation Analysis

After completing the PCB wiring, EM I simulation software and expert system can be used for simulation analysis to simulate the EMC/EMI environment to evaluate whether the product meets the requirements of relevant electromagnetic compatibility standards.