PCB Technical - PCB stackup design

The number of layers of the PCB stackup design depends on the complexity of the circuit board. From the perspective of the PCB processing process, a multi-layer PCB manufactured by stacking and pressing multiple "dual-panel PCBs". However, the number of layers of a multi-layer PCB, the order of stacking between the layers, and the choice of plates are determined by the circuit board designer. This is the so-called "PCB stackup design".

Factors to consider in PCB stackup design

The number of layers and laminated PCB design of a PCB design depends on the following factors:

1. Hardware cost: The number of PCB layers is directly related to the final hardware cost. The more layers, the higher the hardware cost. Hardware PCBs represented by consumer products generally have the highest limit on the number of layers, such as notebook computer products. The number of main board PCB layers is usually 4~6 layers, rarely more than 8 layers;

2. Outlet of high-density components: high-density components represented by BGA packaged devices. The number of outgoing layers of such components basically determines the number of wiring layers of the PCB board;

3. Signal quality control: For PCB design where high-speed signals are concentrated, if the focus is on signal quality, then it is required to reduce adjacent layer wiring to reduce crosstalk between signals. At this time, the number of wiring layers and the number of reference layers (Ground layer or The ratio of Power layer) is preferably 1:1, which will increase the number of PCB design layers; on the contrary, if the signal quality control is not mandatory, the adjacent wiring layer scheme can be used to reduce the number of PCB layers;

4. Schematic signal definition: Schematic signal definition will determine whether the PCB wiring is "smooth", and poor schematic signal definition will cause PCB wiring irregularities and increase the number of wiring layers;

5. PCB manufacturer's processing capability baseline: PCB designers must give full consideration to the PCB manufacturer's processing capability baseline for the stacking design (stacking method, stack thickness, etc.) given by the PCB designer, such as: processing flow, processing equipment capabilities, and commonly used PCBs Plate model and so on.

PCB stackup design

PCB stacking design needs to seek priority and balance among all the above design influence factors.

General rules of PCB stackup design

1. The ground layer and the signal layer should be tightly coupled, which means that the distance between the ground layer and the power layer should be as small as possible, and the dielectric thickness should be as small as possible to increase the capacitance between the power layer and the ground layer (if you don’t understand here), You can think about the plate capacitor, the size of the capacitor is inversely proportional to the spacing).

2. The two signal layers should not be directly adjacent to each other as much as possible, so that signal crosstalk is likely to occur, which affects the performance of the circuit.

3. For multi-layer circuit boards, such as 4-layer boards and 6-layer boards, it is generally required that the signal layer is as close as possible to an internal electrical layer (ground layer or power layer), so that the large-area copper coating of the internal electrical layer can be used to achieve Shield the role of the signal layer, thereby effectively avoiding the crosstalk between the signal layers.

4. For the high-speed signal layer, it is generally located between two internal electrical layers. The purpose of this is to provide an effective shielding layer for high-speed signals on the one hand, and on the other hand to limit the high-speed signals to two internal electrical layers. Between layers, reduce interference to other signal layers.

5. Consider the symmetry of the laminated structure.

6. Multiple grounded internal electrical layers can effectively reduce grounding impedance.

Recommended PCB stackup design

1. Lay high-frequency traces on the top layer to avoid the introduction of inductance due to the use of vias during high-frequency traces. On the top layer isolator and the data line of the transmitting and receiving circuit are directly connected with high-frequency traces.

2. Place a ground plane under the high-frequency signal line to control the impedance of the transmission connection line and also provide a very low inductance path for the return current to flow.

3. Place the power plane under the ground plane. These two reference layers form an additional high-frequency bypass capacitor of approximately 100pF/inch2.

4. PCBstackup design Arrange low-speed control signals on the bottom layer. These signal lines have a large margin to withstand the impedance discontinuity caused by the via, so it is more flexible.