PCB Technical - Electrostatic discharge (ESD) design of PCB board

Electrostatic discharge (ESD) design of PCB board, Many product design engineers usually start to consider the issue of anti-static discharge (ESD) when the product enters the production process. If the electronic equipment cannot pass the anti-static discharge test, usually the final solution must use expensive components, manual assembly during the manufacturing process, or even redesign. Therefore, the progress of the product is bound to be affected.

Even an experienced Electrostatic discharge (ESD) design engineer may not know which parts of the design contribute to anti-static discharge (ESD). Most electronic devices are in an ESD-filled environment 99% of their lifetime. ESD may not come from the human body, furniture, or even the device itself. It is rare for electronic equipment to suffer ESD design damage completely, but ESD interference is very common, which can lead to equipment lockup, reset, data loss and unreliability. The result may be that electronic equipment often fails in the cold and dry winter, but it shows normal during maintenance, which will inevitably affect the confidence of users in electronic equipment and its manufacturers.

1. The mechanism of ESD generation

When a charged conductor approaches another conductor, a strong electric field will be established between the two conductors, causing breakdown caused by the electric field. When the voltage between two conductors exceeds the breakdown voltage of the air and insulating medium between them, an ESD design arc will occur. In 0.7ns to 10ns, the ESD design arc current can reach tens of amperes or even exceed 100A. The ESD arc generates a strong magnetic field with a frequency range of 1MHz-500MHz, which is inductively coupled to each adjacent wiring loop, and generates a current of more than 15A and a high voltage of more than 4KV within a range of 10cm from the ESD arc. The ESD arc will be maintained until the two conductors are in contact short-circuit or the current is too low to sustain the arc.

2. Anti-ESD PCB layout and wiring design

1. Use a multi-layer PCB board structure as much as possible, and arrange a dedicated power supply and ground plane on the inner layer of the PCB board. Use bypass and decoupling capacitors. Try to place each signal layer close to a power layer or ground layer. For high-density PCBs with components on the top and bottom surfaces, short connection lines, and many filled grounds, consider using internal wiring.

2. Ensure that the layout of each functional circuit and the components between each functional circuit is as compact as possible. For circuits or sensitive components that are susceptible to ESD, they should be placed near the center of the PCB board so that other circuits can be used for them. Provide a certain shielding effect. In areas that can be directly hit by ESD design, a ground wire must be placed near each signal line.

3. At the I/O interface of the equipment where ESD design is easy to enter and the place where human hands often need to touch or operate, such as reset button, communication port, on/off button, function button, etc. Usually place a transient protector, series resistance or magnetic beads at the receiving end.

4. To ensure that the signal line is as short as possible, when the length of the signal line is greater than 12 inches (30cm), be sure to lay a ground wire in parallel.

5. Ensure that the loop area between the signal line and the corresponding loop is as small as possible. For long signals, change the position of the signal line and the ground wire every few centimeters or inches to reduce the loop area.

6. Make sure that the loop area between the power supply and the ground is as small as possible, and place a high-frequency capacitor close to each power supply pin of the integrated circuit chip (IC).

7. When possible, fill the unused area with land, and connect the filled land of all layers every<2inch (5cm) distance.

8. When the length of the opening on the power supply or ground plane exceeds 8mm, use a narrow wire to connect both sides of the opening.

9. The reset line, interrupt signal line, or edge trigger signal line cannot be arranged close to the edge of the PCB board.

10. Arrange the annular ground path around the entire periphery of the PCB board, and make the annular ground width of all layers greater than 100mil (2.54mm) as much as possible. Connect the ring grounds of all layers with via holes every 500 mils (12.7 mm), and the signal line is more than 20 mils (0.5 mm) away from the ring ground.