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The Type-c interface has a variety of packages, the most troublesome is the mid-mounted patch interface with EMI ground shielding. PCB design companies help PCB design engineers to design projects that meet specifications faster and easier through the reference design and EVM (evaluation module) techniques summarized.
1. Obtain the latest package from the Type-c interface supplier and check it carefully. Under ideal circumstances, verify the use area and flatness of the interface together with the PCB circuit board factory to provide the necessary reference for the overall layout.
Obtain the latest package from the Type-c interface supplier and double check
2. Perform fan hole processing on Type-c interface. Refer to the previous design documents to know that through holes 8/16 mil vias can be used (no blind and buried vias). In terms of design rules, we set the minimum spacing to 3mil (worst case) and place our vias at (top/bottom). Make sure that the through holes do not touch the pads on the Type-c connector to avoid the appearance of "holes in the disk".
Fan hole processing for Type-c interface
3. The SSTX/RX differential pairs can be seen on the top and bottom layers. Since these are the most important signals, special treatment should be given to these differential lines. For example, the safety distance must meet the 3W wiring and the serpentine length is equal. When the length is equal, the serpentine equal length should be used in order to match the length as much as possible. And as far as possible to ensure the accuracy of the impedance calculation.
4. In order to meet the impedance calculation results, the following wiring processing should be done for the SBU, USB2 and CC1/2 signals.
Do the following wiring processing for SBU, USB2 and CC1/2 signals
5. Since the maximum current carrying current of the Type-c interface is 5A, we are designing the PCB. We use the following two methods. The first is to use a relatively large surface on the inner layer to carry high currents. 0.5 ounces of copper requires a copper width of approximately 125 mm to safely meet 5A. The second method is to use the top/bottom layer to carry most of the current (place the traces/pour out from the data path) about 65 mils of 0.5 ounce copper and pour copper (0.5 ounces) to easily meet 5A. Once the power is close to the Type-c interface, it will be converted twice on the inner layer to make the VBUS vias under the connector and stitch them to the top/bottom with a set of vias for copper paving.
Type-C interface high-speed PCB layout design guide
6. GND copper is laid. Through some newly punched vias, the blank area that appears on the entire board can be used to add reflow GND vias, and the entire module is copper-laid.
Type-C interface high-speed PCB layout design guide
The above 6 points can also be applied to the PCB design of other Type-c interfaces. After mastering the design skills, the time for layout on the Type-c system can be reduced. In addition to these specifications, we consider EMC issues, so we will add corresponding ESD devices at the interface to protect the interface.
The above is the introduction of the Type-C interface high-speed PCB layout design guide. If you have circuit board products, you need to do PCB design, PCB manufacturing, component purchasing, SMT patch processing, DIP plug-in processing, PCBA foundry service, You can contact the PCB factory!
