PCB Technical - Reflections caused by PCB trace width changes

In PCB wiring, such a situation often occurs: when the trace passes through a certain area, due to the limited wiring space in that area, a thinner line has to be used. After passing through this area, the line returns to its original width. Changes in trace width will cause impedance changes, and therefore reflections will occur, which will affect the signal. So under what circumstances can this effect be ignored, and under what circumstances must we consider its impact? There are three factors related to this effect: the magnitude of the impedance change, the signal rise time, and the signal delay on the narrow line.

First discuss the magnitude of the impedance change. The design of many circuits requires the reflected noise to be less than 5% of the voltage swing (this is related to the noise budget on the signal), according to the reflection coefficient formula: ρ=(Z2-Z1)/(Z2+Z1) =△Z /(△Z +2Z1)≤5% The approximate change rate requirement of impedance can be calculated as: △Z/Z1≤10%

The typical index of impedance on the circuit board is +/-10%, and this is the root cause.

If the impedance change occurs only once, for example, after the line width is changed from 8 mil to 6 mil, the width of 6 mil is maintained. To achieve the noise budget requirement that the signal reflection noise at the sudden change does not exceed 5% of the voltage swing, the impedance change must be less than 10%. This is sometimes difficult to do. Take the case of the microstrip line on the FR4 sheet as an example, let's calculate it. If the line width is 8 mils, the thickness between the line and the reference plane is 4 mils, and the characteristic impedance is 46.5 ohms. After the line width changes to 6mil, the characteristic impedance becomes 54.2 ohms, and the impedance change rate reaches 20%. The amplitude of the reflected signal must exceed the standard. As for the impact on the signal, it is also related to the signal rise time and the signal delay from the driving end to the reflection point. But at least this is a potential problem point. Fortunately, the problem can be solved by impedance matching termination at this time.

If the impedance changes twice, for example, after the line width changes from 8 mil to 6 mil, it changes back to 8 mil after pulling out 2 cm. Then there will be reflection at both ends of the 2 cm long and 6 mil wide line. Once the impedance becomes larger, the positive After reflection, the impedance becomes smaller and negative reflection occurs. If the interval between the two reflections is short enough, the two reflections may cancel each other out, thereby reducing the impact. Assuming that the transmission signal is 1V, 0.2V is reflected in a regular reflection, 1.2V continues to be transmitted forward, and -0.2*1.2 = 0.24V is reflected back in the secondary reflection. Assuming that the length of the 6mil line is extremely short, and the two reflections occur almost simultaneously, the total reflection voltage is only 0.04V, which is less than 5% of the noise budget requirement. Therefore, whether this reflection affects the signal and how much affect it is related to the time delay at the impedance change and the signal rise time. Research and experiments show that as long as the time delay at the impedance change is less than 20% of the signal rise time, the reflected signal will not cause problems. If the signal rise time is 1 ns, then the time delay at the impedance change is less than 0.2 ns corresponding to 1.2 inches, and reflection will not cause problems. In other words, for this example, there is no problem as long as the length of the 6 mil-wide trace is less than 3 cm.

When the PCB trace width changes, it is necessary to carefully analyze according to the actual situation, whether it will cause an impact. There are three parameters to pay attention to: how big is the impedance change, what is the signal rise time, and how long is the neck-shaped part of the line width change. Approximately estimate according to the above method, leave a certain margin appropriately. If possible, try to reduce the length of the neck.

It should be pointed out that in actual PCB process, the parameters cannot be as precise as the theory. The theory can provide guidance for our design, but it cannot be copied or dogmatic. After all, this is a practical science. The estimated value should be appropriately revised according to the actual situation, and then applied to the PCB design.