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If a trace is not correctly terminated (terminal matching), the signal pulse from the driver is reflected at the receiving end, causing unexpected effects and distorting the signal contour. When the distortion is very obvious, it can lead to a variety of errors and design failure. At the same time, the sensitivity of distorted signal to noise increases, which will lead to design failure. If the above situation is not considered enough, EMI will increase significantly, which will not only affect the design results, but also cause the failure of the whole system.
The main causes of reflected signal are: too long wiring; unmatched transmission line; excessive capacitance or inductance and impedance mismatch.
PCB technical guide
Delay & Timing Errors
Signal delay and timing error are: when the signal changes between the high and low threshold of logic level, the signal does not jump for a period of time. Excessive signal delay may lead to timing error and device function confusion.
Problems usually occur when there are multiple receivers. Circuit designers must determine the time delay under bad conditions to ensure the correctness of the design. The cause of signal delay: drive overload, too long wiring.
Error crossing logic level threshold multiple times
In the process of jumping, the signal may cross the logic level threshold many times, which leads to this type of error. Multiple crossing logic level threshold error is a special form of signal oscillation, that is, the signal oscillation occurs near the logic level threshold, which will lead to logic function disorder. The causes of the reflected signal are: long wiring, unfinished transmission line, excessive capacitance or inductance, and impedance mismatch.
