PCB Technical - Impedance matching in HDI PCB design

Impedance matching is a way to configure the input impedance of a load or the output impedance of its signal source. Perform it to achieve maximum power transmission and reduce signal reflection from the load. Impedance matching in HDI is entirely to avoid transmission failures, especially losses due to resistance and PCB dielectric.

Microvias can be used to create easy-to-produce PCB traces for impedance matching systems. BGA escape wiring technology and dog-bone fan-out structure can be used to achieve impedance matching in HDI.

When do PCB traces need impedance matching?

Impedance matching is determined by the steepness and rise/fall time of the signal, not by frequency. If the signal's rise/fall time (based on 10% to 90%) is shorter than 6 times the trace delay, it is called a high-speed signal. Here, accurate impedance matching should be performed.

The escape routing strategy to be used when designing a circuit board depends largely on the BGA pitch, which defines the width of the trace allowed to be placed between the solder balls. The fineness of the trace also depends on the manufacturer's restrictions, layer stacking and necessary impedance. When choosing an escape route plan, keep the following guidelines in mind.

The escape routing technique for fine-pitch BGAs with medium number of layers starts with the necking method because traces are routed in and out of the BGA.

External traces can be routed directly to the first row of pads on the circuit board.

The trace width of the second row of pads on the ball grid array is significantly reduced so that it can be mounted between the first row of pads.

To reach the inner pad of the remaining rows, go through the inner layer. Usually, each signal layer is routed to two rows while limiting impedance and HDI crosstalk.

Dogbone fanout is the most popular BGA escape wiring and fanout method

Microvia for BGA escape wiring

If the pad size (including the ring) is small enough for the fine-pitch BGA, use microvias for inner-layer BGA escape routing. The following features distinguish micropores from traditional holes:

Via length: Vias can only pass through one or two layers at most. If the standard thickness PCB has a very high number of layers, the through holes can span more layers, but this requires additional manufacturing procedures. Use stacked blind and buried vias that span a single layer as much as possible.

Micro-hole aspect ratio: The micro-hole aspect ratio (depth divided by diameter) should be 0.75:1. Let us understand the same by considering the example of a 32-layer thick plate. Since the layer thickness (for a 2-layer core) is 2 mils, the diameter should not be less than 2.7 mils.

Micro vias can only be mechanically drilled to 8 mils safely, but due to frequent drill breaks, the cost of mechanical PCB drilling of 8 mils can approach the price of laser drilling. The throughput of mechanical through-holes is lower than that of laser-drilled through-holes because the mechanical drilling must be done carefully to avoid breakage of the drill bit. Therefore, once you start using laser drilling, you will see the total cost of each board drop.

To use dog-bone fan-out on a 0.8 mm pitch BGA, the trace width must be 10 mils or less, and the micro holes must be smaller (approximately 6 mils). For finer pitch ball grid arrays (0.5 mm), use filled and plated micro-holes in the pads to be routed to the inner layer through 7 mil or 8 mil traces. This will provide sufficient spacing between adjacent pads.

Regardless of the design style, the microvias can be stacked or staggered to achieve the required wiring density. Pass IPC 6012 requirements to ensure the best reliability of the size of the micro-holes and surrounding annular ring. The relevance of microvias in pads in BGA escape routing can be understood by the fact that the BGA pitch can be as low as 0.3 mm in some cases.

How to place blind holes for escape wiring

Blind hole method for inner wiring space.

Blind vias are a valuable HDI design method that can free up extra space for internal wiring. When used between vias, these types of vias double the wiring space of the inner layer. It allows additional traces to connect to pins on the internal BGA row. See the picture above; here, only two traces can escape between the through holes on the 1.0 mm BGA surface. However, there are now 6 traces under the blind hole, which increases the routing space by 30%.

Using this method, a quarter of the signal layer is required to connect the high I/O BGA. Blind holes are placed in a cross, L-shaped or diagonal pattern to form a boulevard. The power and ground pin assignments determine which configuration is used.

Placing blind holes in a cross, L-shape or diagonal shape creates a boulevard on the inner layer to allow higher density wiring and escape.

Fan-out section length and trace width

When using high-speed ICs, impedance is almost always a factor. When checking the length of the fan-out section, the relationship between fan-out wiring and impedance control comes into play. Due to the trace length of the via (if any) and parasitic capacitance/inductance, the fan-out part of the BGA will have its impedance.

First, check the signal bandwidth to determine if the signal will be picked up on the trace impedance. If the trace length is significantly smaller than the wavelength corresponding to the high end of the bandwidth, the trace portion of the BGA fan-out can be ignored. The best way is to calculate the load impedance, which is a function of the length of the fan-out trace, and the network input impedance (after necking) created by the fan-out trace.

Use the 10% limit for the required length of the signal wavelength as a good approximation. A cautious 10% limit for digital signals with a knee frequency of 20GHz will result in a critical length of 0.73mm (stripline in FR4 substrate). This means that larger ICs, such as FPGAs, need to provide impedance-matched fan-out for single-ended and differential pairs.

Via inductance, parasitic capacitance between the circuit board and the pad, and pin inductance in the IC are critical. The low-pass T filter circuit is composed of these parts. The 3dB cutoff frequency is just a typical number that can be evaluated from the LC resonant circuit, provided that the through-hole inductance is set equal to the lead inductance. The T filter circuit is used as an impedance matching circuit to modify the output impedance of the driver IC.

A low-pass T filter circuit with through-hole inductance, parasitic capacitance between the circuit board and the pad, and pin inductance as the main components.

If the impedance of the via part that connects the fan-out trace to the internal trace is uncertain, it is difficult to match the impedance of the fan-out part. However, as long as the via part is very short and directly spans several layers, this fact can be ignored. The total input impedance, including vias and internal traces, is determined by the internal trace impedance across a small number of layers. This is why the via impedance is usually not considered.

Why can't the trace width be greater than the pad size?

The width of the trace is proportional to its impedance, and it plays a vital role when you enter the HDI state. Vias will become so small that once the trace width is small enough, they must be made as microvias.

Create an impedance curve for the PCB stack and use this width as a design guide. After calculating the width required for impedance control, you only need to specify this value as a design rule. It is best to perform crosstalk simulation for the recommended trace width to see if it will cause excessive crosstalk.

Impedance matching in HDI is related to maintaining signal quality because components and traces are closely spaced. Therefore, controlling impedance becomes an incredible task. Effective use of microvias is the key to impedance matching HDI systems. The escape routing technology of finer-pitch BGA and the dog-bone fan-out method can be used to achieve impedance matching in HDI.