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PCB Technical

PCB Technical - PCB circuit board stackup reference

PCB Technical

PCB Technical - PCB circuit board stackup reference

PCB circuit board stackup reference

2021-09-23
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Author:Aure

PCB circuit board stackup reference



Definition of terms: SIG: signal layer; GND: ground layer; PWR: power layer;

The stacking arrangement of the circuit board is the basis of the entire system design of the PCB. If the laminated design is defective, it will ultimately affect the EMC performance of the whole machine.

In general, the laminated design must comply with two rules:

1. Each wiring layer must have an adjacent reference layer (power or ground layer);

2. The adjacent main power layer and ground layer should be kept at a minimum distance to provide a larger coupling capacitance;

The stacks from two-layer boards to ten-layer boards are listed below:

2.1 Stacking of single and double panels;

For two-layer boards, due to the small number of layers, there is no longer a problem of lamination. The control of EMI radiation is mainly considered from the wiring and layout; the electromagnetic compatibility problems of single-layer boards and double-layer boards are becoming more and more prominent. The main reason for this phenomenon is that the signal loop area is too large, which not only produces strong electromagnetic radiation, but also makes the circuit sensitive to external interference. To improve the electromagnetic compatibility of the circuit, the easiest way is to reduce the loop area of the key signal.



PCB circuit board stackup reference


Key signal: From the perspective of electromagnetic compatibility, the key signal mainly refers to the signal that generates strong radiation and the signal that is sensitive to the outside world. The signal that can generate strong radiation is generally a periodic signal, such as a low-order signal of a clock or an address. Signals that are sensitive to interference are analog signals with lower levels.

Single and double-layer boards are usually used in low-frequency analog designs below 10KHz:

1 The power traces on the same layer are routed radially, and the total length of the lines is minimized;

2 When running the power and ground wires, they should be close to each other; place a ground wire on the side of the key signal wire, and this ground wire should be as close as possible to the signal wire. In this way, a smaller loop area is formed and the sensitivity of differential mode radiation to external interference is reduced. When a ground wire is added next to the signal wire, a loop with the smallest area is formed, and the signal current will definitely take this loop instead of other ground wires.

3 If it is a double-layer circuit board, you can lay a ground wire along the signal wire on the other side of the circuit board, immediately below the signal wire, and the first wire should be as wide as possible. The loop area formed in this way is equal to the thickness of the circuit board multiplied by the length of the signal line.

2.2 The stack of four-layer boards;

Recommended stacking method:

2.2.1 SIG-GND(PWR)-PWR (GND)-SIG;

2.2.2 GND-SIG(PWR)-SIG(PWR)-GND;

For the above two laminated designs, the potential problem is for the traditional 1.6mm (62mil) board thickness. The layer spacing will become very large, which is not only unfavorable for controlling impedance, interlayer coupling and shielding; in particular, the large spacing between power ground planes reduces the board capacitance and is not conducive to filtering noise.

For the first scheme, it is usually applied to the situation where there are more chips on the board. This scheme can get better SI performance, which is not very good for EMI performance. It is mainly controlled by wiring and other details. Main attention: The ground layer is placed on the connecting layer of the signal layer with the densest signal, which is beneficial to absorb and suppress radiation; increase the area of the board to reflect the 20H rule.

For the second solution, it is usually used where the chip density on the board is low enough and there is enough area around the chip (place the required power copper layer). In this scheme, the outer layers of the PCB are all ground layers, and the middle two layers are signal/power layers. The power supply on the signal layer is routed with a wide line, which can make the path impedance of the power supply current low, and the impedance of the signal microstrip path is also low, and the signal radiation of the inner layer can also be shielded by the outer layer. From the perspective of EMI control, this is the best 4-layer PCB structure available. Main attention: The distance between the middle two layers of signal and power mixing layers should be widened, and the wiring direction should be vertical to avoid crosstalk; the board area should be appropriately controlled to reflect the 20H rule; if the wiring impedance is to be controlled, the above solution should be very careful to route the wires Arranged under the copper island for power supply and grounding. In addition, the copper on the power supply or ground layer should be interconnected as much as possible to ensure DC and low-frequency connectivity.

2.3 The stack of six-layer boards;

For the design with higher chip density and higher clock frequency, the design of 6-layer board should be considered

Recommended stacking method:

2.3.1 SIG-GND-SIG-PWR-GND-SIG;

For this kind of scheme, this kind of laminated scheme can get better signal integrity, the signal layer is adjacent to the ground layer, the power layer and the ground layer are paired, the impedance of each wiring layer can be better controlled, and two The stratum is capable of absorbing magnetic field lines well. And when the power supply and ground layer are intact, it can provide a better return path for each signal layer.

2.3.2 GND-SIG-GND-PWR-SIG -GND;

For this kind of scheme, this kind of scheme is only suitable for the situation that the device density is not very high, this kind of lamination has all the advantages of the upper lamination, and the ground plane of the top and bottom layers is relatively complete, which can be used as a better shielding layer To use. It should be noted that the power layer should be close to the layer that is not the main component surface, because the plane of the bottom layer will be more complete. Therefore, the EMI performance is better than the first solution.

Summary: For the six-layer board scheme, the distance between the power layer and the ground layer should be minimized to obtain good power and ground coupling. However, although the thickness of the board is 62mil and the layer spacing is reduced, it is not easy to control the spacing between the main power supply and the ground layer to be small. Comparing the first scheme with the second scheme, the cost of the second scheme will increase greatly. Therefore, we usually choose the first option when stacking. When designing, follow the 20H rule and the mirror layer rule design

2.4 Stack of eight-layer boards; no registration required

Eight-layer boards usually use the following three stacking methods

2.4.1 This is not a good lamination method due to poor electromagnetic absorption and large power supply impedance. Its structure is as follows:

1 Signal 1 Component surface, microstrip wiring layer

2 Signal 2 internal microstrip wiring layer, better wiring layer (X direction)

3 Ground

4 Signal 3 Stripline routing layer, better routing layer (Y direction)

5 Signal 4 Stripline routing layer

6 Power

7 Signal 5 internal microstrip wiring layer

8 Signal 6 Microstrip trace layer

2.4.2 is a variant of the third stacking method. Due to the addition of the reference layer, it has better EMI performance, and the characteristic impedance of each signal layer can be well controlled.

1 Signal 1 Component surface, microstrip wiring layer, good wiring layer

2 Ground stratum, good electromagnetic wave absorption ability

3 Signal 2 Stripline routing layer, good routing layer

4 Power power layer, forming excellent electromagnetic absorption with the ground layer below

5 Ground

6 Signal 3 Stripline routing layer, good routing layer

7 Power ground layer, with large power supply impedance

8 Signal 4 Microstrip wiring layer, good wiring layer

2.4.3 The best stacking method, due to the use of multi-layer ground reference planes, it has very good geomagnetic absorption capacity.

1 Signal 1 Component surface, microstrip wiring layer, good wiring layer

2 Ground stratum, good electromagnetic wave absorption ability

3 Signal 2 Stripline routing layer, good routing layer High-speed download

4 Power power layer, forming excellent electromagnetic absorption with the ground layer below

5 Ground

6 Signal 3 Stripline routing layer, good routing layer

7 Ground stratum, good electromagnetic wave absorption ability

8 Signal 4 Microstrip wiring layer, good wiring layer

2.5 Summary

How to choose how many layers of boards are used in the design and how to stack them depends on many factors such as the number of signal networks on the board, device density, PIN density, signal frequency, board size and so on. We must consider these factors comprehensively. For the more signal networks, the greater the device density, the greater the PIN density, and the higher the signal frequency, the multilayer board design should be used as much as possible. To get good EMI performance, it is best to ensure that each signal layer has its own reference layer.

PCB stack reference:

Layer 2 S1 and ground, S2 and power

4 layers S1, ground, power, S2

6 layers S1, S2, ground, power, S3, S4

6 layers S1, ground, S2, S3, power, S4

6 layers S1, power supply, ground, S2, ground, S3

8 layers S1, S2, ground, S3, S4, power, S5, S6

8 layers S1, ground, S2, ground, power, S3, ground, S4

10 layers S1, ground, S2, S3, ground, power, S4, S5, ground, S6

10 layers S1, S2, power, ground, S3, S4, ground, power, S5, S6