PCB Technical - Design of Power Integrity in High Speed PCB

I. Introduction

With the gradual increase in PCB design complexity, in addition to reflection, crosstalk, and EMI analysis for signal integrity, stable and reliable power supply has also become one of the key research directions for designers. Especially when the number of switching devices continues to increase and the core voltage continues to decrease, the fluctuation of the power supply will often have a fatal impact on the system, so people put forward a new term: power integrity, referred to as PI (powerintegrity). In today's international market, IC design is relatively developed, but power integrity design is still a weak link. Therefore, this article proposes the generation of power integrity problems in PCB boards, analyzes the factors that affect power integrity, and proposes optimization methods and empirical designs to solve power integrity problems in PCB boards. It has strong theoretical analysis and practical engineering applications. value.

2. The cause and analysis of power supply noise

We analyze the cause of power supply noise through a NAND circuit diagram. The circuit diagram in Figure 1 is a structure diagram of a three-input NAND gate. Because the NAND gate is a digital device, it works by switching between "1" and "0" levels. With the continuous improvement of IC technology, the switching speed of digital devices is getting faster and faster, which introduces more high-frequency components, and the inductance in the loop can easily cause power fluctuations at high frequencies. As in Figure 1, when the NAND gate inputs are all high, the transistor in the circuit is turned on, the circuit is short-circuited momentarily, and the power supply charges the capacitor while flowing into the ground wire. At this time, due to the parasitic inductance on the power line and the ground line, we can know from the formula V=LdI/dt that this will produce voltage fluctuations on the power line and the ground line, as shown in Figure 2 by the rising edge of the level. ΔI noise. When the NAND gate input is low, the capacitor discharges at this time, which will produce a large ΔI noise on the ground; and the power supply at this time only has the sudden current change caused by the instantaneous short circuit of the circuit, because there is no charge to the capacitor. The sudden change in current is smaller than the rising edge. From the analysis of the NAND gate circuit, we know that the root causes of power supply instability are mainly in two aspects: First, the transient alternating current is too large when the device is switched at high speed;

The second is the inductance that exists on the current loop. The so-called ground power integrity problem means that in a high-speed PCB, when a large number of chips are turned on or off at the same time, a large transient current will be generated in the circuit. At the same time, due to the existence of inductance and resistance on the power line and ground line, There will be voltage fluctuations on both. Knowing the nature of the power integrity problem, we know that to solve the power integrity problem, first of all, for high-speed devices, we add decoupling capacitors to remove its high-frequency noise components, so as to reduce the transient time of the signal; For the inductance present in the loop, we have to consider the hierarchical design of the power supply.

Third, the application of decoupling capacitors

In high-speed PCB design, decoupling capacitors play an important role, and its placement location is also very important. This is because when the power supply supplies power to the load for a short time, the stored charge in the capacitor can prevent the voltage from falling. If the capacitor is placed in an improper position, the line impedance may be too large and affect the power supply. At the same time, the capacitor can filter out high-frequency noise during high-speed switching of the device. In our high-speed PCB design, we generally add a decoupling capacitor to the output end of the power supply and the power input end of the chip. The capacitance value close to the power supply end is generally larger (such as 10μF). This is because we generally use In order to filter the power supply noise, the resonant frequency of the DC power supply can be relatively low; at the same time, the large capacitor can ensure the stability of the power supply output. For the decoupling capacitor added to the pin of the chip connected to the power supply, its capacitance value is generally small (such as 0.1μF), because in high-speed chips, the noise frequency is generally higher, which requires the addition of decoupling The resonant frequency of the capacitor should be high, that is, the capacitance of the decoupling capacitor should be small.

Regarding the placement of decoupling capacitors, we know that improper placement will increase the line impedance, reduce its resonant frequency and affect the power supply. For the decoupling capacitor and the inductance in the chip or power supply, we can use the formula:

In the formula, l: the line length between the capacitor and the chip; r: the line radius; d: the distance between the power line and the ground;

From this we know that to reduce the inductance L, you must reduce l and d, that is, reduce the loop area formed by the decoupling capacitor and the chip, that is, the capacitor and the chip are required to be as close as possible to the chip device.

Fourth, the design of the power circuit

To ensure power integrity, we know that a good power distribution network is essential. First of all, for the design of the power line and the ground line, we must ensure that the line width is thicker (for example, the width is 40mil, and the ordinary signal line is 10mil), so as to reduce the impedance value as much as possible. With the speed of the chip getting higher and higher, according to the 5/5 rule, we are using more and more multilayer boards, which are powered by a dedicated power layer and a dedicated ground layer to form a loop, thus reducing the inductance of the circuit.