With the improvement of IC device integration, the gradual miniaturization of equipment and the increasing speed of devices, the EMI problem in electronic products has become more serious. From the point of view of EMC/EMI design of system equipment, properly handling EMC/EMI issues in the PCB design stage of the equipment is the most effective and lowest cost method for system equipment to meet electromagnetic compatibility standards. This article introduces EMI control technology in digital circuit PCB design.
1 Principle of EMI generation and suppression
The generation of EMI is caused by the electromagnetic interference source transmitting energy to the sensitive system through the coupling path. It includes three basic forms: conduction via wire or common ground, radiation through space, or near-field coupling. The hazard of EMI is manifested in reducing the quality of the transmission signal, causing interference or even damage to the circuit or equipment, making the equipment unable to meet the technical index requirements specified by the electromagnetic compatibility standard.
In order to suppress EMI, the EMI design of digital circuits should be carried out according to the following principles:
.According to the relevant EMC/EMI technical specifications, the indicators are decomposed into single-board circuits and controlled at different levels.
.Control from the three elements of EMI, namely, interference source, energy coupling path and sensitive system, so that the circuit has a flat frequency response and ensures the normal and stable operation of the circuit.
.Start with the front-end design of the equipment, pay attention to the EMC/EMI design, and reduce the design cost.
2 EMI control technology of digital circuit PCB
When dealing with various forms of EMI, specific problems must be analyzed in detail. In the PCB design of digital circuits, EMI can be controlled from the following aspects.
2.1 Device selection
When designing EMI, we must first consider the speed of the selected device. In any circuit, if a device with a rise time of 5ns is replaced with a device with a rise time of 2.5ns, EMI will increase by about 4 times. The radiation intensity of EMI is proportional to the square of the frequency. The highest EMI frequency (fknee) is also called the EMI emission bandwidth. It is a function of the signal rise time rather than the signal frequency: fknee = 0.35/Tr (where Tr is the signal rise time of the device )
The frequency range of this radiated EMI is 30MHz to several GHz. In this frequency band, the wavelength is very short, and even very short wiring on the circuit board may become a transmitting antenna. When the EMI is high, the circuit easily loses its normal function. Therefore, in the selection of devices, under the premise of ensuring the performance requirements of the circuit, low-speed chips should be used as much as possible, and a suitable driving/receiving circuit should be adopted. In addition, because the lead pins of the device all have parasitic inductance and parasitic capacitance, in high-speed design, the influence of the device package form on the signal cannot be ignored, because it is also an important factor in generating EMI radiation. Generally, the parasitic parameters of SMD devices are smaller than that of plug-in devices, and the parasitic parameters of BGA packages are smaller than QFP packages.
2.2 Connector selection and signal terminal definition
The connector is a key link in high-speed signal transmission, and it is also a weak link that is prone to EMI. More ground pins can be arranged in the terminal design of the connector to reduce the distance between the signal and the ground, reduce the effective signal loop area that generates radiation in the connector, and provide a low-impedance return path. When necessary, consider isolating some key signals with ground pins.
2.3 Stacked design
Under the premise of cost permitting, increasing the number of ground plane layers and placing the signal layer close to the ground plane layer can reduce EMI radiation. For high-speed PCBs, the power plane and ground plane are closely coupled, which can reduce the power supply impedance, thereby reducing EMI.
2.4 Layout
According to the signal current flow, a reasonable layout can reduce the interference between signals. Reasonable layout is the key to controlling EMI. The basic principles of the layout are:
.The analog signal is easily interfered by the digital signal, and the analog circuit should be separated from the digital circuit;
.The clock line is the main source of interference and radiation. Keep away from sensitive circuits and keep the clock line shortest;
.High-current, high-power circuits should be avoided as far as possible in the central area of the board, and the effects of heat dissipation and radiation should be considered;
.The connector should be arranged on one side of the board as far as possible and far away from the high-frequency circuit;
.The input/output circuit is close to the corresponding connector, and the decoupling capacitor is close to the corresponding power supply pin;
.Fully consider the feasibility of the layout for power supply division, and multi-power devices should be placed across the boundary of the power supply division area to effectively reduce the impact of plane division on EMI;
.The return plane (path) is not divided.
2.5 Wiring
.Impedance control: High-speed signal lines will present the characteristics of transmission lines, and impedance control is required to avoid signal reflection, overshoot and ringing, and reduce EMI radiation.
.Classify the signals, according to the EMI radiation intensity and sensitivity of different signals (analog signal, clock signal, I/O signal, bus, power supply, etc.), separate the interference source and the sensitive system as much as possible, and reduce the coupling.
.Strictly control the trace length of the clock signal (especially the high-speed clock signal), the number of vias, the partitioning area, the termination, the wiring layer, the return path, etc.
.The signal loop, that is, the loop formed by the signal flowing out to the signal flowing in, is the key to EMI control in PCB design and must be controlled during wiring. To understand the flow direction of each key signal, the key signal should be routed close to the return path to ensure that its loop area is the smallest.
For low-frequency signals, make the current flow through the path with the least resistance; for high-frequency signals, make the high-frequency current flow through the path with the least inductance, not the path with the least resistance (see Figure 1). For differential mode radiation, the EMI radiation intensity (E) is proportional to the current, the area of the current loop, and the square of the frequency. (I is the current, A is the loop area, f is the frequency, r is the distance to the center of the loop, and k is a constant.)
Therefore, when the minimum inductance return path is just below the signal wire, the area of the current loop can be reduced, thereby reducing the EMI radiation energy.
.Key signals must not cross the segmented area.
.High-speed differential signal wiring should be tightly coupled as much as possible.
.Ensure that the strip line, microstrip line and its reference plane meet the requirements.
.The lead wire of the decoupling capacitor should be short and wide.
.All signal traces should be as far away from the edge of the board as possible.
.For a multi-point connection network, select a suitable topology to reduce signal reflection and reduce EMI radiation.
2.6 Split processing of the power plane
.Segmentation of power layer
When there are one or more sub-power supplies on a main power plane, ensure the continuity of each power supply area and sufficient copper foil width. The dividing line does not need to be too wide, generally 20-50mil line width is enough to reduce the gap radiation.
.Separation of ground layer
The ground plane should be kept intact to avoid splitting. If it must be divided, it is necessary to distinguish between digital ground, analog ground and noise ground, and connect to the external ground through a common ground point at the exit.
In order to reduce the edge radiation of the power supply, the power/ground plane should follow the 20H design principle, that is, the size of the ground plane is 20H larger than the size of the power plane (see Figure 2), so that the fringe field radiation intensity can be reduced by 70%.
3 Other control methods of EMI
3.1 Power system design
.Design a low-impedance power system to ensure that the impedance of the power distribution system in the frequency range lower than fknee is lower than the target impedance.
.Use filters to control conducted interference.
.Power decoupling. In EMI design, providing reasonable decoupling capacitors can make the chip work reliably, reduce high-frequency noise in the power supply, and reduce EMI. Due to the influence of wire inductance and other parasitic parameters, the response speed of the power supply and its power supply wires is slow, which makes the instantaneous current required by the driver in the high-speed circuit insufficient. Reasonably design the bypass or decoupling capacitors and the distributed capacitors of the power supply layer, so that the energy storage effect of the capacitor can be used to quickly provide current to the device before the power supply responds. Correct capacitive decoupling can provide a low-impedance power path, which is the key to reducing common-mode EMI.
3.2 Grounding
Grounding design is the key to reducing EMI of the entire board.
. Make sure to use single-point grounding, multi-point grounding or mixed grounding.
.Digital ground, analog ground, and noise ground should be separated, and a suitable common ground point should be determined.
.If the double-panel design has no ground wire layer, it is very important to design the ground wire grid reasonably, and ensure that the width of the ground wire>the width of the power wire>the width of the signal wire. A large-area paving method can also be used, but it is necessary to pay attention to the continuity of the large-area on the same floor.
.For the multi-layer board design, ensure that there is a ground plane layer to reduce the common ground impedance.
3.3 Connecting damping resistors in series
Under the premise that the circuit sequence requirements allow, the basic technique to suppress the interference source is to connect a small resistance resistor in series at the key signal output end, usually a 22-33Ω resistor. These small resistors in series at the output can slow down the rise/fall time and smooth the overshoot and undershoot signals, thereby reducing the amplitude of the high-frequency harmonics of the output waveform and achieving the purpose of effectively suppressing EMI.
3.4 Shield
.Key components can use EMI shielding materials or shielding nets.
.The shielding of key signals can be designed as strip lines or separated by ground wires on both sides of the key signals.
3.5 Spread Spectrum
The spread spectrum (spread spectrum) method is a new and effective method to reduce EMI. Spread spectrum is to modulate the signal and expand the signal energy to a relatively wide frequency range. In fact, this method is a controlled modulation of the clock signal, and this method will not significantly increase the jitter of the clock signal. Practical application proves that spread spectrum technology is effective and can reduce radiation by 7 to 20dB.
3.6 EMI analysis and testing
.Simulation analysis
After PCB wiring is completed, EM I simulation software and expert system can be used for simulation analysis to simulate the EMC/EMI environment to evaluate whether the product meets the requirements of relevant electromagnetic compatibility standards.
.Scan test
Use an electromagnetic radiation scanner to scan the assembled and powered-on machine disk to obtain the electromagnetic field distribution map in the PCB (as shown in Figure 3, the red, green, and blue-white areas in the figure indicate the electromagnetic radiation energy from low to high). According to the test As a result, PCB design is improved.
4 summary
With the continuous development and application of new high-speed chips, signal frequencies are getting higher and higher, and the PCB boards that carry them may become smaller and smaller. PCB design will face more severe EMI challenges. Only continuous exploration and continuous innovation can make the EMC/EMI design of PCB boards succeed.