PCBA Tech - Six kinds of common integrated circuit packaging

1. SO package

Most small-scale integrated circuits with fewer leads use this small package. There are several types of SO packages. The chip width is less than 0.15in, and the number of electrode pins is relatively small (usually between 8 and 40 pins), which is called SOP package; the chip width is more than 0.25in, and the number of electrode pins is more than 44. This kind of chip is called SOL package, this kind of chip is commonly used in random access memory (RAM); the chip width is more than 0.6in, the number of electrode pins is more than 44, it is called SOW package, this kind of chip is commonly used in programmable memory (E2PROM). Some SOP packages use miniaturized or thin packages, which are called SSOP packages and TSOP packages, respectively. Most SO package pins use wing-shaped electrodes, and some memories use J-shaped electrodes (called SOJ), which is conducive to expanding the storage capacity on the socket. The pin pitch of SO package is 1.27mm, 1.0mm, 0.8mm, 0.65mm and 0.5mm.

2. QFP package

QFP (Quad Flat Package) is a four-side pin flat package, which is one of the main packaging forms of surface-mounted integrated circuits. The pins are drawn from four sides in a wing (L) shape. There are three kinds of substrates: ceramic, metal and plastic. In terms of quantity, plastic packaging accounts for the vast majority. When the material is not specifically indicated, it is plastic QFP in most cases. Plastic QFP is the most popular multi-pin LSI package. It is used not only for digital logic LSI circuits such as microprocessors and gate arrays, but also for analog LSI circuits such as VTR signal processing and audio signal processing. The pin center distance has various specifications such as 1.0mm, 0.8mm, 0.65mm, 0.5mm, 0.4mm, 0.3mm, etc. The minimum pin spacing is 0.3mm, and the maximum is 1.27mm. The maximum number of pins in the 0.65mm center distance specification is 304.

In order to prevent pin deformation, several improved QFP varieties have appeared. For example, the BQFP with resin cushion pads (corner ears) on the four corners of the package has protrusions on the four corners of the package body to prevent the pins from bending and deforming during transportation or operation.

3. PLCC package

PLCC is a leaded plastic chip carrier package for integrated circuits. Its pins are hooked back inwards, called hook-shaped (J-shaped) electrodes. The number of electrode pins is 16 to 84, and the pitch is 1.27mm. Most of the integrated circuits packaged by PLCC are programmable memories. The chip can be installed on a dedicated socket, which can be easily removed to rewrite the data; in order to reduce the cost of the socket, the PLCC chip can also be directly soldered on the circuit board, but manual soldering is more difficult. The appearance of PLCC is square and rectangular. The square shape is called JEDEC MO-047, with 20~124 pins; the rectangular shape is called JEDEC MO-052, with 18~32 pins.

4. LCCC package

LCCC is a package without pins in the SMD integrated circuit packaged by a ceramic chip carrier; the chip is packaged on a ceramic carrier, and the shape is square and rectangular. The leadless electrode solder ends are arranged on the four sides of the bottom of the package. The electrodes The number of squares is 16, 20, 24, 28, 44, 52, 68, 84, 100, 124, and 156, and the rectangles are 18, 22, 28, and 32, respectively. There are two types of lead pitch: 1.0mm and 1.27mm.

The characteristic of the LCCC lead-out terminal is that there is a castle-like metalized groove on the side of the ceramic shell to connect with the gold-plated electrode on the bottom of the shell, which provides a short signal path, low inductance and capacitance loss, and can be used for high-frequency working conditions, such as micro Processor unit, gate array and memory.

The chip of the LCCC integrated circuit is fully sealed, high reliability, but high in price. It is mainly used in military products, and it must be considered whether the thermal expansion coefficient between the device and the circuit board is consistent.

5. PQFN package

PQFN is a leadless package with a square or rectangular shape. There is a large exposed pad at the center of the package bottom, which improves the heat dissipation performance. There are conductive pads for electrical connection around the periphery of the package around the large pads. Since the PQFN package does not have wing-shaped pins like SOP, QFP, etc., the conductive path between the internal pin and the pad is short, the self-inductance and the wiring resistance in the package are very low, so it can provide good electrical performance. Because PQFN has good electrical and thermal properties, small size and low mass, it has become an ideal choice for many new applications. PQFN is very suitable for applications in high-density products such as mobile phones, digital cameras, PDAs, DVs, smart cards and other portable electronic devices.

6. BGA package

The BGA package is the ball grid array package. It changes the J-shaped or wing-shaped electrode pins of the original device PccQFP package into spherical pins, and changes the "single linear" sequence of electrodes from the periphery of the device body to the "full" under the bottom of the body. The "flat" grid array is arranged. In this way, the pin spacing can be evacuated and the number of pins can be increased. The solder ball array can be completely or partially distributed on the bottom surface of the device.

The BGA method can significantly reduce the package surface area of the chip: Assuming that a large-scale integrated circuit has 400 I/O electrode pins, and the same pin pitch is 1.27mm, then the square QFP chip has 100 pins on each side, and the side is long. At least 127mm, the surface area of the chip must be 160cm2; and the electrode pins of the square BGA chip are evenly arranged under the chip in 20*20 rows, with a side length of only 25.4mm, and the surface area of the chip is less than 7cm2. It can be seen that for large-scale integrated circuits with the same function, the size of the BGA package is much smaller than that of the QFP, which is conducive to improving the assembly density on the PCB.

From the perspective of assembly and soldering, the mounting tolerance of BGA chips is 0.3mm, which is much lower than the requirement of 0.08mm for QFP chips. This makes the mounting reliability of BGA chips significantly improved, and the process error rate is greatly reduced. The assembly requirements can be basically met with ordinary multi-functional placement machines and reflow soldering equipment.

The use of BGA chips shortens the average line length of the product and improves the frequency response and other electrical properties of the circuit.

When soldering with reflow soldering equipment, the high surface tension of the solder ball leads to the self-alignment effect of the chip (also called "self-centering" or "self-positioning" effect), which improves the quality of assembly and welding.

Because of the obvious advantages of BGA packaging, BGA varieties of large-scale integrated circuits are also rapidly diversifying. Many forms have emerged, such as ceramic BGA (CBGA), plastic BGA (PBGA), and micro-BGA (Micro-BGA, µBGA or CSP). The main difference between the first two lies in the package substrate material. For example, CBGA uses ceramic. PBGA uses BT resin; the latter refers to those micro-integrated circuits whose package size is relatively close to the chip size.