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PCBA Tech

PCBA Tech - Eight mistakes in PCB design

PCBA Tech

PCBA Tech - Eight mistakes in PCB design

Eight mistakes in PCB design

2021-09-29
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Author:Frank

Misconception 1: the PCB design requirements of this board are not high, so use thinner wire and automatic cloth. Comment on: Automatic wiring must occupy larger PCB area, at the same time, many times more than the manual wiring hole, large in batch products, PCB manufacturer price considering the factors in addition to business factors, is the line width and number of holes, which affect the yield of PCB and the consumption of bit number, save the cost of supplier, also give the price to find the reason.

Misconception 2: These bus signals are pulled by resistors to feel safer. Comments: Signals need to be pulled up and down for many reasons, but not all of them. Pull resistance to pull up and down a single input signal, the current is below a few microamps, but a driving signal, the current will reach milliamperes, now the system is often the 32-bit address data, there may be 244/245 after isolation of bus and other signal, are pulled, a few watts of power consumption on the resistance.

Misconception 3: How to deal with these unused I/O ports of CPU and FPGA? Let's leave it empty and talk about it later. Comments: If the unused I/O port is suspended, a little interference from the outside may become the input signal of repeated oscillation, and the power consumption of MOS devices basically depends on the number of gate flipping. If you pull it up, each pin will also have microamperes of current, so the best way is to set it to output (of course, no other driven signal outside).

pcb board

Misconception 4: The power consumption of FGPA is proportional to the number of flip-flops used and the number of flips, so the power consumption of the same FPGA model can vary by a factor of 100 at different times in different circuits. Minimizing the number of flip-flops at high speed is the fundamental method to reduce FPGA power consumption.

Misconception 5: The power consumption of these small chips is low. An ABT16244 consumes less than 1 ma without a load, but its index is that each pin can drive a load of 60mA (such as a resistance matching tens of ohm), that is, the maximum power consumption of 60*16=960mA at full load. Of course, it's just that the power current is so strong that the heat is falling on the load.

Misconception 6: There are so many control signals in the memory, I only need to use OE and WE signals on this board, so that the data will come out much faster when reading. Comments: The power consumption of most memory will be more than 100 times greater when chip selection is effective (regardless of OE and WE) than when chip selection is not, so CS should be used to control the chip whenever possible and the width of chip selection pulse should be reduced as far as possible if other requirements are met.

Misconception 7: How do these signals have been rushed? As long as the match is good, the comment can be eliminated: except for a few specific signals (such as 100Base-T, CML), there is overrush. As long as the signal is not very large, it does not necessarily need to match, and even if the match is not the best match. As TTL output impedance is less than 50 ohms, or even 20 ohm, if in such a big match their resistance, the current is very big, power consumption is unacceptable, and signal amplitude will be too small to use, say average output signal in the output of high level and low output impedance of electricity at ordinary times not the same, also don't do match exactly. Therefore, the matching of TTL, LVDS, 422 and other signals can be accepted as long as overshoot is achieved.

Misconception 8: Reducing power consumption is a matter of hardware personnel, and software has nothing to do. Comment on: Hardware is just a stage, but the show is software, almost every chip on the bus access, every signal flip is almost controlled by software. If the software can reduce the access times of external memory (more use of register variables, more use of internal CACHE, etc.), timely response to interrupts (interrupts are usually low level effective with pull-up resistance) and other specific measures for specific boards will make great contributions to the power consumption reduction.