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1. Overlapping of FPC pads
1.1. Overlapping of the bonding pads (except the surface bonding pads) means overlapping holes, which may result in breaking of the drill bit and damage to the holes during the drilling process due to repeated drilling in one place.
1.2. Two holes in the multilayer plate overlap, for example, one hole is the isolating disc and the other hole is the connecting disc (flower bonding disc). As a result, the negative is drawn as the isolating disc, resulting in scrap.
2. Abuse of Graphics Layer
2.1. Some useless connections have been made on some graphics layers, but lines with more than five layers have been designed instead of four layers, which causes misinterpretation.
2.2. Design-time diagrams are effortless. Take Protel software as an example, to draw lines with the Board layer for each layer, and to mark lines with the Board layer. In light-drawing data, when the Board layer is not selected, lines are lost and disconnected, or lines are short-circuited because the Board layer's labeling line is selected, so the integrity and clarity of the graphics layer are maintained during design.
2.3. It is inconvenient to violate the conventional design, such as the design of the component surface in the Bottom layer and the design of the welding surface in Top.
3. Disordering of characters
3.1. Character cap SMD solder pads, which bring inconvenience to the test of the breakage of printed boards and the welding of components.
3.2. The character design is too small to make screen printing difficult and too large to overlap characters, making it difficult to distinguish.
4. Setting up of one-sided weld pad aperture
4.1. Single-sided bonding pads generally do not drill holes. If the holes need to be marked, the hole size should be designed to be zero. If a numeric value is designed, the coordinate of the hole will appear at this location and the problem will arise when the drilling data is generated.
4.2. Special labeling should be made for single-sided bonding pads such as drilling holes.
5. Draw bonding pads with filler blocks
Drawing pads with filler blocks can pass DRC inspection in the design of the circuit but is not feasible for processing. Therefore, such pads cannot directly generate resistance data. When using the upper resistor, the filler block area will be covered by the solder, which makes it difficult to assemble the device.
6. Electric stratum is flower bonding pad and connection
Because the power source is designed as a patterned pad, the stratum is opposite to the image on the actually printed circuit board, and all connections are isolation lines, which the designer should be very clear about. By the way, care should be taken when drawing sets of power supply or isolation lines in several places. No gaps should be left to short-circuit the two sets of power supplies or block the connected area (so that a set of power supplies is separated).
7. Ambiguous definition of processing level
7.1. The single panel is designed on the TOP layer. If the reverse and forward are not specified, the panel may be made with components and not well welded.
7.2. For example, a four-layer board is designed with four layers of TOP mid1 and mid2 bottom, but it is not placed in this order during processing, which requires instructions.
8. Too many filling blocks in the design or very thin lines filling the filling blocks
8.1. There is a loss of light-drawing data and the light-drawing data is incomplete.
8.2. Because filling blocks are drawn one by one in light-drawing data processing, the amount of light-drawing data generated is quite large, which makes data processing more difficult.
9. The bonding pad of the surface mounting device is too short
This is for the on-off test. For too dense surface-mounted devices, the distance between feet is quite small and the pad is very thin. To install the test pin, it must be in an up-down (left-right) staggered position, such as the pad design is too short, which does not affect the device installation, but will not cause the test pin to misplace.
10. The spacing between large grids is too small
The edges between the lines that make up a large area of gridlines are too small (less than 0.3mm). In the process of making printed circuit boards, the graphics conversion process is easy to produce a lot of broken membranes attached to the boards after developing, resulting in line breakage.
11. Large area of copper foil is too close to the outer frame
A large area of copper foil should be at least 0.2mm away from the outer frame because when milling the shape, such as copper foil, it is easy to cause the copper foil to warp and cause the problem of flux shedding.
12. Ambiguous shape border design
Some customers have designed profiles in the Keep layer, Board layer, Top over layer, etc. and these profiles are not coincident, which makes it difficult for FPC Flexible Circuit Board manufacturer to determine which profile line to use.
13. Uneven graphic design
The uneven coating caused by graphic electroplating affects the quality.
Use gridlines when the 14-layer copper area is too large to avoid blistering during SMT patch processing.
