PCB News - CM6800 PCB layout considerations

1. The wiring of the amplifier compensation network should be short, and the components should be close to the IC.

2. Separate the layout of the power ground and the signal ground, and then select a point to connect to SGND and PGND.

3. The signal part ground and power part ground are laid out separately and then connected to the GND of the IC (to the original-GND IC).

4. The amplifier traces crossing the isolation boundary should be as close as possible, 431 should be as close as possible to the charging coupler, and the phototransistor should be as close as possible to the IC amplifier.

5. The upper end of the feedback resistor sampling will add an RC absorption network when the output voltage is greater than or equal to 10V or the connection is far away.

6. The absorption loop components are as close as possible to the absorbed components.

7. When using what kind of IC, be fully familiar with the precautions given by IC datesheets.

8. Pay attention to the insulation distance of high-voltage and high-power lines and the shorter the better.

9. High-voltage and high-power lines should consider the interference to other components. Mainly for the linear part of the IC amplifier and the small signal part of the signal feedback.

10. The bypass capacitors of IC's Vcc and VREF should be close to the IC, high-quality ceramic capacitors, and large enough capacity.

11. Learn to refer to the PCB board experience and layout points of Application Note or Demo hood.

12. The leads for driving the MOS are at medium power, and should be as short as possible under possible conditions.

13. When only 1Pin is GND, the compensation network line should be connected to GND separately and the Rt1 Ct and VREF bypass capacitor should be connected together and then grounded, and the power stage should be grounded separately.

14. The greater the driving capability of the IC, the larger the bypass capacitor.

15. The higher the operating frequency, the smaller the bypass capacitor capacity, and the larger the bypass capacitor with lower frequency. But the ESR and ESL of the bypass capacitor should be smaller.

16. A shielding layer can be added to the IC small board.

In short, engineers have to establish a concept, the longer the line is equivalent to inductance, the west line is too close to add capacitance. The ground wire is a trash can of electromagnetic pollution. High-voltage, high-frequency, and high-power lines are sources of interference. (Living within 100M of high-voltage line for 15 to 20 years will lose life for 5 years).

CM6800 Layout Note

CM6800 is the world's first PFC PWM Combin synthesis IC ML4800R. Excellent improved version. There are some new patented technologies in the improvement. The leads are the same as 4800, so the layout has many commonalities.

The PFC of CM6800 is a typical traditional continuous current type average current control method, so the PFC part has complete pins and is relatively easy to handle. However, there are several principles and points for attention in PCB Layout in the future.

1. The ILIMT of the PWM part should be grounded independently.

2. The Vcc bypass capacitor shall be close to the VCC and GND terminals based on 3 pieces.

3. The VREF bypass capacitor should be as close as possible to the terminal and the IEAO network to be connected.

4. PFC output and PWM drive output, keep a certain distance between the two lines, and leave the compensation network of the amplifier.

5. After the GND of the PFC and PWM parts are connected separately externally, then connect to the GND (10pin). The GND should preferably not be a resistive board, but a star connection.

6. Connect the GND of IAC, I-Senkser, VRMS, etc. of the PFC part at one place.

7. The compensation network from IEAO. to VREF of the PFC current amplifier should be as close as possible and not close to the strong power part.

8. For PFC's IEAO, the compensation network should also avoid the strong power part and connect it to GND separately near the line.

9. The VDC of the PWM part should be grounded with SS to prevent interference. The RAMP1 and RAMP2 parts should be grounded together. The distance between the VDC and the optocoupler should be as short as possible.

FAN4803 Layout notes:

(The combination of PFC and PWM is concentrated; high output impedance; small signal; low impedance; high level; high frequency; so the components must be placed carefully and small, and the grounding must be careful and careful. The IC is placed on the bottom surface and the large components Separate it to prevent the large di/dt part of the PCB from getting close to it. The power device should be as close as possible to the bulk capacitor ground, and the line should be as short as possible. The side line between the drain of the PFC inductor MO2 and the boost diode should be short and not close to the IC. Then the IC is partially connected to the ground of the Bulk capacitor.)

1. The bypass capacitor is close to the IC and the two ends are directly connected to the GND pin and Vccpin. 1uf capacitor is required for 4803.

2. The return line of the compensation component is independent and directly connected to the IC GND terminal. (As shown in the figure, the connection method of the PFC large bulk capacitor ground wire), and the shorter the line, the better.

3. Isolated from repeated high voltage waveforms, for example, current detection resistance, fair-time capacitance of high input impedance circuit, and current detection input and output of the error amplifier of the PFC.

4. The connections to the Bulk capacitor and IC GND are connected in a star shape, that is, to the ground respectively, do not connect them together externally.

5. Ensure that the noise return is extremely low, and the interference prevents high-frequency and high-power, high-voltage information from being connected or components connected back to the IC terminals. (For example, the gate drive signal will also interfere)

Final recommendations:

1. The Layout engineer briefly understands the IC used before the start of each case, and mainly knows the functions of each pin, for example:

Vcc VREF GND PGND FB COMP

RT CT Ramp feedforward out1 out2

PFC out PWM out, etc., and understand what to pay attention to.

2. It is more important to check the placement and key connections than to check the correctness of the wiring!

3. Implement the third person responsible review method, that is, other engineers who have used this IC add an auxiliary procedure to check each written.

4. The RD test engineer should understand that Layout is an important part of the design process, point out the attention points to the Layout engineer, and give the overall layout position.

5. The RD manager reviews whether the design, drawing, inspection and review procedures are complete before issuing.

The above is the introduction of CM6800 PCB layout considerations. Ipcb is also provided to PCB manufacturers and PCB manufacturing technology