Microwave Tech - How to make PCB board wiring level higher

PCB board wiring is very important in the entire PCB circuit board design. How to achieve fast and efficient wiring and make your PCB circuit board wiring look tall is worth studying.

1. Common ground processing of digital circuit and analog circuit
Nowadays, many PCB circuit boards are no longer single-function circuits, but are composed of a mixture of digital circuits and analog circuits. Therefore, it is necessary to consider the mutual interference between them when wiring, especially the noise interference on the ground wire. The frequency of the digital circuit is high, and the sensitivity of the analog circuit is strong. For the signal line, the high-frequency signal line should be as far away as possible from the sensitive analog circuit device. For the ground line, the whole PCB circuit board has only one node to the outside world. Therefore, it is necessary to deal with the problem of digital and analog common ground inside the PCB circuit board, and the digital ground and analog ground inside the board are actually separated. They are not connected to each other, but at the interface where the PCB circuit board connects to the outside world. . There is a short connection between the digital ground and the analog ground. Please note that there is only one connection point. There are also non-common grounds on the PCB circuit board, which is determined by the system design.

2. The signal line is laid on the electrical layer
In the multi-layer printed board wiring, because there are not many wires left in the signal line layer that have not been laid out, adding more layers will cause waste and increase a certain amount of work in production, and the cost will increase accordingly. To solve this contradiction, you can consider wiring on the electrical layer. The power layer should be considered first, and the ground layer second. Because it preserves the integrity of the formation.

3. Treatment of connecting legs in large area conductors
In large-area grounding, the legs of commonly used components are connected to it, and the treatment of the connecting legs needs to be considered comprehensively. In terms of electrical performance, it is better that the pads of the component legs are fully connected to the copper surface, but the soldering of the components There are some undesirable hidden dangers in assembly, such as: 1. Welding requires a high-power heater. 2. It is easy to cause virtual solder joints. Therefore, both electrical performance and process requirements are made into cross-patterned pads, called thermal isolation, commonly known as thermal pads, so that the possibility of virtual solder joints due to excessive cross-section heat during soldering can be greatly reduced.

4. The role of the network system in wiring
In many CAD systems, wiring is determined based on the network system. The grid is too dense, although the path has increased, but the step is too small, and the amount of data in the field is too large. This will inevitably have higher requirements for the storage space of the device, and also the computing speed of the computer-type electronic products. Great influence. Some paths are invalid, such as those occupied by the pads of the component legs or by mounting holes or fixed holes. Too sparse grids and too few channels have a great impact on the distribution rate. So there must be a reasonable grid system to support the wiring. The distance between the legs of standard components is 0.1 inches, so the basis of the grid system is generally set to 0.1 inches or an integral multiple of less than 0.1 inches, such as: 0.05 inches, 0.025 inches, 0.02 inches, etc.

5. Treatment of power supply and ground wire
Even if the wiring in the entire PCB circuit board is completed very well, the interference caused by the improper consideration of the power supply and the ground wire will reduce the performance of the product, and sometimes even affect the success rate of the product. Therefore, the wiring of the power supply and the ground wire should be taken seriously, and the noise interference generated by the power supply and the ground wire should be reduced to the limit to ensure the quality of the product. Every engineer who is engaged in the design of electronic products understands the cause of the noise between the ground wire and the power wire, and now only the reduced noise suppression is expressed: it is well known that the power supply and the ground wire are added. Lotus capacitor. Try to widen the width of the power and ground wires. The ground wire is wider than the power wire. Their relationship is: ground wire>power wire>signal wire. Usually the signal wire width is 0.2～0.3mm, and the fine width can reach 0.05～0.07mm., The power cord is 1.2～2.5 mm. For the PCB circuit board of the digital circuit, a wide ground wire can be used to form a loop, that is, to form a ground net for use. The ground of the analog circuit cannot be used in this way. A large area of copper layer is used as the ground wire. All places used are connected to the ground as a ground wire. Or it can be made into a multilayer board, and the power supply and ground wires occupy one layer each.

6. Design Rule Check (DRC)
After the wiring design is completed, it is necessary to carefully check whether the wiring design conforms to the rules set by the designer, and at the same time, it is also necessary to confirm whether the established rules meet the requirements of the printed board production process. The general inspection has the following aspects: line and line, line Whether the distance between the component pad, line and through hole, component pad and through hole, and through hole and through hole is reasonable, and whether it meets the production requirements. Is the width of the power line and the ground line appropriate, and is there a tight coupling between the power line and the ground line? Is there any place to widen the ground wire in the PCB circuit board? Whether measures have been taken for the key signal lines, such as short lengths, protection lines, and input lines and output lines are clearly separated. Whether there are separate ground wires for analog circuit and digital circuit. Whether the graphics (such as icons, annotations) added to the PCB circuit board will cause signal short circuit. Modify some undesirable line shapes. Is there a process line on the PCB circuit board? Whether the solder mask meets the requirements of the production process, whether the size of the solder mask is appropriate, and whether the character logo is pressed on the device pad, so as not to affect the quality of the electrical equipment. Whether the outer frame edge of the power ground layer in the multilayer board is reduced, if the copper foil of the power ground layer is exposed outside the board, it is easy to cause a short circuit.

7. Via design
Vias are one of the important components of multi-layer PCB circuit boards, and the cost of drilling holes usually accounts for 30% to 40% of the cost of PCB circuit board manufacturing. Simply put, every hole on the PCB circuit board can be called a via. From the point of view of function, vias can be divided into two categories: one is used for electrical connections between layers; the other is used for fixing or positioning devices. In terms of process, vias are generally divided into three categories, namely blind holes, buried holes and through holes.

Blind vias are located on the top and bottom surfaces of the printed circuit board and have a certain depth. They are used to connect the surface line and the underlying inner line. The depth of the hole usually does not exceed a certain ratio. Buried hole refers to the connection hole located in the inner layer of the printed circuit board, which does not extend to the surface of the circuit board. The above-mentioned two types of holes are both located in the inner layer of the circuit board, and are completed by a through-hole forming process before lamination, and several inner layers may be overlapped during the formation of the via. The third type is called a through hole, which penetrates the entire circuit board and can be used for internal interconnection or as a component mounting positioning hole. Because the through hole is easier to implement in the process and the cost is lower, it is used in most of the printed circuit boards instead of the other two types of through holes. The via holes mentioned below, unless otherwise specified, are considered as via holes.

1) From a design point of view, a via is mainly composed of two parts, one is the hole in the middle, and the other is the pad area around the hole. The size of these two parts determines the size of the via. Obviously, in the design of high-speed and high-density PCB circuit boards, designers always hope that the smaller the via holes, the better, so that more wiring space can be left on the board. In addition, the smaller the via holes, the parasitic itself. The smaller the capacitance, the more suitable for high-speed circuits. However, the reduction in hole size also brings about an increase in cost, and the size of vias cannot be reduced indefinitely. It is limited by process technologies such as drilling and electroplating: the smaller the hole, the longer it takes to drill. Longer, the easier it is to deviate from the center position; and when the depth of the hole exceeds 6 times the diameter of the drilled hole, it cannot be guaranteed that the hole wall can be uniformly plated with copper. For example, the thickness of a normal 6-layer PCB circuit board is about 50Mil, so the hole diameter that PCB circuit board manufacturers can provide can only reach 8Mil.
2) the parasitic capacitance of the via hole itself has a parasitic capacitance to the ground. If it is known that the diameter of the isolation hole on the ground layer of the via is D2, the diameter of the via pad is D1, and the thickness of the PCB circuit board is T, The dielectric constant of the board substrate is ε, and the parasitic capacitance of the via is approximately: C="1".41εTD1/(D2-D1) The main effect of the parasitic capacitance of the via on the circuit is to extend the signal The rise time reduces the speed of the circuit. For example, for a PCB circuit board with a thickness of 50Mil, if a via with an inner diameter of 10Mil and a pad diameter of 20Mil is used, and the distance between the pad and the ground copper area is 32Mil, we can approximate it by the above formula The parasitic capacitance of the hole is roughly: C=1.41x4.4x0.050x0.020/(0.032-0.020)=0.517pF, the rise time change caused by this part of the capacitance is: T10-90=2.2C(Z0/2)= 2.2x0.517x(55/2)=31.28ps. From these values, it can be seen that although the effect of the rise delay caused by the parasitic capacitance of a single via is not very obvious, if the via is used multiple times in the trace to switch between layers, the designer should still consider carefully.
3) Parasitic inductance of vias Similarly, there are parasitic inductances along with parasitic capacitances in vias. In the design of high-speed digital circuits, the damage caused by the parasitic inductances of vias is often greater than the impact of parasitic capacitance. Its parasitic series inductance will weaken the contribution of the bypass capacitor and weaken the filtering effect of the entire power system. We can simply calculate the approximate parasitic inductance of a via with the following formula: L="5".08h[ln(4h/d)+1] where L refers to the inductance of the via, and h is the length of the via, d is the diameter of the center hole. It can be seen from the formula that the diameter of the via has a small effect on the inductance, while the length of the via has an effect on the inductance. Still using the above example, the inductance of the via can be calculated as: L=5.08x0.050[ln(4x0.050/0.010)+1]=1.015nH. If the rise time of the signal is 1ns, then its equivalent impedance is: XL=πL/T10-90=3.19Ω. Such impedance can no longer be ignored when high-frequency current passes. Special attention should be paid to the fact that the bypass capacitor needs to pass through two vias when connecting the power plane and the ground plane, so that the parasitic inductance of the via will increase exponentially.
4) Via design in high-speed PCB circuit board Through the above analysis of the parasitic characteristics of vias, we can see that in the design of high-speed PCB circuit boards, seemingly simple vias will often bring to the design of the circuit. Great negative effect. In order to reduce the adverse effects caused by the parasitic effects of the vias, the following can be done in the design:
1. Considering both cost and signal quality, choose a reasonable size via size. For example, for the 6-10 layer memory module PCB circuit board design, it is better to use 10/20Mil vias. For some high-density small-size boards, you can also try to use 8/18Mil vias. Under current technical conditions, it is difficult to use smaller vias. For power or ground vias, you can consider using a larger size to reduce impedance.
2. The two formulas discussed above can be concluded that the use of a thinner PCB circuit board is beneficial to reduce the two parasitic parameters of the via.
3. Try not to change the layers of the signal traces on the PCB circuit board, that is to say, try not to use unnecessary vias.
4. The power and ground pins should be drilled nearby, and the lead between the via and the pin should be as short as possible, because they will increase the inductance. At the same time, the power and ground leads should be as thick as possible to reduce impedance.
5) Place some grounded vias near the vias of the signal change layer to provide a close loop for the signal. It is even possible to place a large number of redundant ground vias on the PCB circuit board. Of course, the design needs to be flexible. The via model discussed earlier is the case where there are pads on each layer. Sometimes, we can reduce or even remove the pads of some layers. Especially when the density of vias is very high, it may lead to the formation of a break groove that separates the circuit in the copper layer. To solve this problem, in addition to moving the position of the via, we can also consider placing the via on the copper layer. The pad size is reduced